Paper Abstract The PCB 4.0 research project offers the opportunity to take the flexibility, energy efficiency, and resource efficiency of production processes to a whole new level through intelligent control and networking. The development of electronics and sensors, which is among the strengths of small and medium-sized enterprises (SMEs) in Germany in particular, plays a key role here. The integration of sensors into workpieces and systems must be as compact as possible for flexible and efficient data acquisition. Miniaturized radio sensor nodes offer this possibility, but their production and integration currently still pose major technical challenges. The objective of the research project PCB 4.0 is the creation of a technology platform for the design and manufacture of embedded miniaturized radio frequency (RF) sensor nodes and their integration into production processes. Four dedicated scenarios, that reflect different phases of the product life cycle, demonstrate the performance of the developed technologies - ranging from production to component use - detecting and processing the actual state in the production of industrial electronics in real time. A maintenance-free Bluetooth Low Energy (BLE) sensor node was developed to report environmental data (e.g. temperature, acceleration) during lifecycle of an Industry 4.0 PCB. The embedded security chip from WIBU-Systems AG, called “CmASIC”, provides asymmetric, cryptographic algorithms and certificates to guarantee the highest level of authenticity during the PCB production process and over the entire product lifecycle. In addition, a highly miniaturized sensor node (11×10×1.6 mm3) was developed using PCB embedding technology. The node includes an integrated PCB helix antenna, embedded accumulator and a sensor with media access. The embedding technology was transferred to mass production on 610×457 mm2 manufacturing panel size. To optimize the design flow of sensor nodes, a PCB design tool was created using Altium® Designer interface. This tool's highly efficient interactive and automatic functionalities support all aspects of the PCB design process with embedded components. For device genuineness control, a centralized license management system was used, a tool for generating and deploying certificates to securely track device identities, supporting the industrial production chain. Sensor data and other status information (e.g. wear level, authenticity) are made available via two cloud solutions (Siemens MindSphere and a solution for small and medium-sized businesses by partner Sensorik Bayern GmbH (SBG)). Demonstrators were developed to support scenarios for future industrial demands. During test runs, the sensor nodes howed the potential to monitor and control the process flow and system lifetime directly at the component level. The paper describes the technological developments towards miniaturized sensor nodes as well as the integration of those miniaturized SiPs (System-in-Package) into a sensor network. Finally, the application of such sensor networks for smart manufacturing is demonstrated for selected use cases.

The scope of the European project TIPS (Thin Interconnected Package Stacks) is the fabrication of ultra thin packages for electronic components and the subsequent stacking and interconnection of those packages to form highly compact modules. In the first part of this paper approaches to fabricate ultra thin 10 x 10 mm packages by embedding technologies for chips into printed circuit board environments will be discussed. Technologies for commercial flexible printed circuit board substrates (polyimide sandwiched in Cu layers) and respective fabrication processes are used. After initial patterning of the Cu the chips are die bonded to the flex substrates and subsequently lamination into build up layers. Electrical contact between the chip and a fan out routing on the outer layer of the package are made by micro via formation, electroplating and wet chemical structuring of the metal layers. The thickness of the embedded components is constricted to 50 m in order to constrai n the package thicknesses to a maximum of 100 m with this approach. Packages are fabricated in batches of 150 x 150 mm sheets of flex substrates. Stacking of individual packages can be performed in an automated package by package placement process using a frame as alignment tool and typical flexible printed circuit boards adhesives. In this way only known-good-packages are stacked in order to minimize yield loss. However, a more straight forward process is stacking of the packages using fabrication batches and established multilayer printed circuit board technologies. The disadvantage is the potential yield loss if one of the packages in a stacked layer is faulty. For either type of stacking process the individual stacks have to be milled out of the stack fabrication batch. After stacking and sound mechanical interconnection the electronic interconnection between layers is made by the sequence mechanical through hole drilling, plating and wet chemical structuring. Test issues, design considerations and results of first fabrication runs will be presented and discussed

The scope of the European project TIPS (Thin Interconnected Package Stacks) is the fabrication of ultra thin packages for electronic components and the subsequent stacking and interconnection of those packages to form highly compact modules. In the first part of this paper approaches to fabricate ultra thin 10 × 10 mm packages by embedding technologies for chips into printed circuit board environments will be discussed. One technology uses commercial flexible printed circuit board substrates (polyimide sandwiched in Cu layers) and respective fabrication processes. After initial patterning of the Cu the chips are die bonded to the flex substrates and subsequently laminated into build up layers. Electrical contact between the chip and a fan out routing on the outer layer of the package are made by micro via formation, electroplating and wet chemical structuring of the metal layers. The thickness of the embedded components is constricted to 50 μm in order to constrain the package thicknesses to a maximum of 100 μm with this approach. The alternative approach, the ultra thin chip package (UTCP) technology, aims at package thicknesses around 60 μm. In this case 20 μm thick chips are die-bonded to thin polyimide layer. A photo-definable polyimide is then applied over the assembled chips by spin-on technique. Contact pads are opened by exposure and development of the polyimide, followed by metal sputtering, electroplating and etching. In this approach the thickness of embedded components is typically 20-30 μm and final package thickness is in the range of 60 μm. In both approaches the packages are fabricated as batches consisting of 150 × 150 mm sheets of flex substrates. Stacking of individual packages can be performed in an automated package by package placement process using a frame as alignment tool and typical flexible printed circuit boards adhesives. In this way only known-good-packages are stacked in o- - rder to minimize yield loss. However, a more straight forward process is stacking of the packages using fabrication batches and established multilayer printed circuit board technologies. The disadvantage is the potential yield loss if one of the packages in a stacked layer is faulty. For either type of stacking process the individual stacks have to be milled out of the stack fabrication batch. Development issues, design considerations and results of first fabrication runs will be presented and discussed

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