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The paper brings an overview of main challenges and design techniques effectively applicable for ultra-low voltage analog integrated circuits in nanoscale technologies. New design challenges linked with a low value of the supply voltage and the process fluctuation in nanotechnologies, such as device models, robustness to process variation, device mismatch and others are discussed firstly. Then, design techniques and approaches to analog integrated circuits towards (ultra) low-voltage systems and applications are described. Finally, examples of basic building blocks of ultra-low voltage analog ICs designed in standard CMOS technology using such design techniques are presented. Finally, the developed circuits are compared to the state-of-the-art solutions in terms of the main parameters and features.

In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.

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