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A new high-performance normally-off gallium nitride (GaN)-based metal-oxide-semiconductor high electron mobility transistor that employs an ultrathin subcritical 3 nm thick aluminium gallium nitride (Al 0.25 Ga 0.75 N) barrier layer and relies on an induced two-dimensional electron gas for operation is presented. Single finger devices were fabricated using 10 and 20 nm plasma-enhanced chemical vapor-deposited silicon dioxide (SiO 2 ) as the gate dielectric. They demonstrated threshold voltages (V th ) of 3 and 2 V, and very high maximum drain currents (I DSmax ) of over 450 and 650 mA/mm, at a gate voltage (V GS ) of 6 V, respectively. The proposed device is seen as a building block for future power electronic devices, specifically as the driven device in the cascode configuration that employs GaN-based enhancement-mode and depletion-mode devices.

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Process development of AlN/GaN MOS-HEMTs is presented, along with issues and problems concerning the fabrication processes. The developed technology uses thermally grown Al 2 O 3 as a gate dielectric and surface passivation for devices. Significant improvement in device performance was observed using the following techniques: (1) Ohmic contact optimisation using Al wet etch prior to Ohmic metal deposition and (2) mesa sidewall passivation. DC and RF performance of the fabricated devices will be presented and discussed in this paper.

This paper presents first results of a new high performance enhancement‐mode (E‐mode) gallium nitride (GaN) based metal‐oxide semiconductor high electron mobility transistor (MOS‐HEMT) that employs an ultrathin 3 nm aluminium gallium nitride (Al0.25G0.75aN) barrier layer and relies on an induced two dimensional electron gas (2DEG) for operation. Devices have been demonstrated on both sapphire and silicon substrates. Single finger devices on a sapphire substrate were fabricated using 10 nm and 20 nm, and on a silicon substrate using 30 nm of plasma enhanced chemical vapour‐deposited (PECVD) silicon dioxide (SiO2) as the gate dielectric. They demonstrated threshold voltages of +3 V, +2 V, +0.8 V and very high maximum drain currents of over 620 mA/mm, 550 mA/mm and 450 mA/mm, respectively. These results show that the proposed device concept can be a building block for future power electronic devices. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)