A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

Brown, R. W.; MacFarlane, D.; Al-Khalidi, Abdullah; Li, Xu; Ternent, G.; Zhou, Haiping; Thayne, Iain; Wasige, Edward

doi:10.1109/led.2014.2334394

Cited by 46 publications

(16 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The authors in Ref. [20] explained that the source and drain Ohmic regions are the major sources for 2DEG in enhancement mode MOSHEMTs. However, the device with SiO 2 showed a V T of 0 V and presence of 2DEG even at zero gate bias in Fig.…”

Section: Resultsmentioning

confidence: 99%

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

Swain

Jena

Lenka

2016

Materials Science in Semiconductor Processing

View full text Add to dashboard Cite

Section: Resultsmentioning

confidence: 99%

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

Swain

Jena

Lenka

2016

Materials Science in Semiconductor Processing

View full text Add to dashboard Cite

“…The task of ensuring the integration of e-mode PHEMT to the manufactured d-mode PHEMT on the available technological equipment for the possibility of making a new class of devices on gallium nitride is defined at the Institute of Ultra-High-Frequency Semiconductor Electronics, RAS. According to the literature, the most common methods of obtaining normally-off transistors on the AlGaN/GaN are fluorine (F-) implantation into the gate region [1]- [3], using thin structures [4], formation of the p-type GaN region under the gate [6]- [8], etching of the AlGaN barrier layer under the gate [9]- [15].…”

Section: Introductionmentioning

confidence: 99%

The Technology of Manufacturing for Complementary Transistors on Gallium Nitride

Pavlov

Gamkrelidze

Tomosh

et al. 2019

MES

View full text Add to dashboard Cite

The need to fabricate normally-off transistors that provide operation in the enhancement mode is confirmed by publications last 3-4 years. The use of normally-off transistors in power electronics provides for a more simple and safe operation of microcircuits. Manufacture of a power and analog part on one chip will expand the electronic component base. For manufacturing of a normally-off field-effect transistor based on the AlGaN/GaN heterostructures, it is proposed to form a gate recess by a low-energy plasma-chemical etching of the AlGaN barrier layer in a high-density plasma with an inductively coupled plasma source. Etching is due to cyclic oxidation of the barrier layer with subsequent chemical removal of the oxidized layer in the chlorine-containing environment. The proposed method allows to controllably etching of the AlGaN layers with a rate of 1.5 nm / cycle without defect formation. Inductively coupled plasma makes it possible to obtain a plasma with high density and low energies of charged particles interacting with the sample surface. This avoids the occurrence of radiation defects in the near-surface layers of the heterostructure. The high concentration of charged particles in the reactor during the plasma chemical processes ensures high homogeneity and quality of etching. Reducing the thickness of the barrier layer of the heterostructure due to dry etching and the gate metallization ensures the operation of the transistor in the enhancement mode. The use of dry low-energy plasmachemical etching in the technological cycle of manufacturing microcircuits allows one to fabricate transistors operating in the regime of enhancement and depletion. Кeywords-normally-off transistor, gallium nitride, heterostructure, enhancement mode, depletion mode, barrier layer, plasma-chemical etching, a system on a crystal, power, microwave-high-power semiconductor electronics. I.

show abstract

“…This technology requires the fabrication of E‐mode HEMT transistors, using AlGaN/GaN or III‐Nitride based heterostructures, that require additional technological efforts. They can be realised by gate‐recess etching , self‐terminating plasma free etching , fluoride based plasma treatment , adding different cap layers , using specifically designed thin barrier layers , applying piezo neutralisation layers , integrating different oxides into the III‐Nitride HEMT technology , applying work function engineering or tri‐gate (fin‐FET) structures , as well as other approaches. Alternatively, integrated digital circuits can be fabricated using exclusively the depletion mode (D‐mode) devices.…”

Section: Introductionmentioning

confidence: 99%

AlGaN HEMT based digital circuits on 3C-SiC(111)/Si(111) pseudosubstrates

Jatal

Hörselmann

Jacobs

et al. 2017

Phys. Status Solidi A

View full text Add to dashboard Cite

GaN capped Al 0.2 Ga 0.8 N/AlN/GaN heterostructures were grown on 3C-SiC (111)/Si (111) substrates and used for the implementation of digital circuits. The AlGaN/GaN heterostructure was grown by MOCVD, whereas the 3C-SiC(111)/ Si(111) pseudosubstrate was fabricated using low temperature LPCVD. The SiC layer was 50 nm thick. The presented digital circuits were realised using depletion-mode load and drive high electron mobility transistors. In order to demonstrate the feasibility of digital circuits using standard depletion mode device technology, NAND and NOR digital circuits were designed and fabricated using a standard Au/Ti/ Al/Ti and Au/Ni metallisation scheme for the ohmic and Schottky contacts of the high electron mobility transistors, respectively. The logic function and the voltage transfer characteristics of the fabricated logic circuits are demonstrated and analysed.

show abstract

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

Cited by 46 publications

References 12 publications

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

Oxide interfacial charge engineering towards normally-off AlN/GaN MOSHEMT

The Technology of Manufacturing for Complementary Transistors on Gallium Nitride

AlGaN HEMT based digital circuits on 3C-SiC(111)/Si(111) pseudosubstrates

Contact Info

Product

Resources

About