This work describes two data center efficiency metrics: Power Usage Effectiveness (PUE) and Compute Power Efficiency (CPE). PUE characterizes the fraction of the total data center power used for IT work. CPE characterizes the overall data center efficiency, considering IT equipment utilization as well as how power is used in the data center. The PUE results from three data center studies are presented here. The data suggests that a carefully designed and managed data center has a PUE of 2.0. More studies are required to determine the range of values for the typical data center. A data center infrastructure and energy cost model is presented to compare hardware costs to infrastructure and energy costs. The impact of PUE on these costs is examined to illustrate the impact of data center efficiency on the total cost of operating a data center.

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Three-dimensional (3D) stacked integrated circuit (IC) chips offer significant performance improvement, but offer important challenges for thermal management including, for the case of microfluidic cooling, constraints on channel dimensions, and pressure drop. Here, we investigate heat transfer and pressure drop characteristics of a microfluidic cooling device with staggered pin-fin array arrangement with dimensions as follows: diameter D = 46.5 μm; spacing, S ∼ 100 μm; and height, H ∼ 110 μm. Deionized single-phase water with mass flow rates of m˙ = 15.1–64.1 g/min was used as the working fluid, corresponding to values of Re (based on pin fin diameter) from 23 to 135, where heat fluxes up to 141 W/cm2 are removed. The measurements yield local Nusselt numbers that vary little along the heated channel length and values for both the Nu and the friction factor do not agree well with most data for pin fin geometries in the literature. Two new correlations for the average Nusselt number (∼Re1.04) and Fanning friction factor (∼Re−0.52) are proposed that capture the heat transfer and pressure drop behavior for the geometric and operating conditions tested in this study with mean absolute error (MAE) of 4.9% and 1.7%, respectively. The work shows that a more comprehensive investigation is required on thermofluidic characterization of pin fin arrays with channel heights Hf < 150 μm and fin spacing S = 50–500 μm, respectively, with the Reynolds number, Re < 300.

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Portage is a scalable and extensible remap library for numerical simulations. It supports state-of-the-art remap schemes for meshes and particles in 2D and 3D up to a second-order accuracy. Portage ensures critical properties such as local/global conservation and bounds preservation for mesh remap. It enables multi-material field remap through a dedicated plugin, and leverages the hybrid parallelism exposed by advanced architectures using multi-processing and multi-threading.

New blade chassis designs, with banks of aggregate fans and system-level thermal architectures which precisely manage airflow, have enabled a new level of energy savings for enterprise customers that extends beyond the system and offers an opportunity for new system thermal design principles. By reducing system airflow rate to an absolute minimum, system fan power is minimized.More significantly, lowering airflow rates reduces data center cooling infrastructure power requirements. This work outlines the opportunities enabled by extending this concept to all IT equipment design and coupling the concept with data centers control mechanisms, tying server inlet temperatures to air conditioning flow rates and set point temperatures, for breakthrough infrastructure cost structures.KEY WORDS: IT equipment energy efficiency, data center thermal management, airflow management.