Due to the rapid growth in the use of Internet and mobile communications, the high speed transmission capacity requirements have been increasing at a high rate. As a result of this, the semiconductor and packaging technologies have seen significant advances. Especially, wireless communication systems in the microwave/millimeter wave bands, such as LMDS (Local Multipoint Distribution System), Point to Point radio, and satellite communications are expected to see significant growth in a consumer market.High Frequency Integrated circuits to be used in broadband transmission would be implemented in materials such as GaAs, SiGe, and InP. Some effort is seen to develop passivation films for these devices so that they can be used without additional packaging, but so far these attempts have not met with much success. The requirements for ceramic packaging have remained very strong and stable. As the microwave/millimeter wave applications are gradually transferring to the consumer market, the packaging must meet the demands for high reliability, miniaturization, lower cost, and low electrical loss. Although several surface mount package types for high frequency have been proposed to meet those requirements, the return loss starts dropping drastically around 30GHz level. Then, there are no clear reports on the work done to reduce these losses.This paper shows and explains the key points of the simulation and design technologies for high frequency SMT package. Then, we introduce practical examples of packages designed for high frequency by using simulation technology in order to improve the transmission properties of the package. We have manufactured prototype samples of such packages and confirmed the results of simulation by actual measurements. The measurement results show S11<-15dB and S21<-1dB per port up to 50 GHz (including the board interface). Therefore we introduce a surface mount BGA package suitable for up to 50 GHz. As for package material, we used low loss LTCC(Low Temperature Cofired Ceramic [GL560]), (Er=6.0, tangent delta= 0.0023 at 10 GHz) in order to lower the capacitance at the ball portion.
The process speed of high-end servers and supercomputers are steadily increasing. As a result, the backbone of the high speed processing, such as high-end LSI (flip-chip type), and associated substrate circuits is also becoming more dense and miniaturized, while supporting higher current densities. However, recent studies indicate that the higher current density triggers an electromigration (EM) at the solder bumps connecting the under bump metallurgy (UBM) of the flip-chip pad (e.g. Ni) and substrate pads (e.g. Ni/Au). This electromigration leads to voids within the solder joints, which may result in an open circuit. As of result, the life-cycle of the packaged devices is shortened. Thus solution to the EM issue is critical. To respond to such concerns, we have studied the mechanism of the void development, by closely examining differences in diffusion rate among the connective metals - within the pads and the solders. We have mitigated the EM occurrence by reducing the differences in diffusion rate by utilizing high purity Cu for the substrate metallization pads, Cu exhibits a diffusion rate similar to Sn used in solder bumps. Also, solder wettability was improved by utilizing a solder on pad (SOP) construction. As of result we were able to successfully demonstrate an improved life-cycle of the flip-chip solder joints, while accommodating a higher current density. Furthermore, a glass ceramic substrate was used for our study. Since this particular glass ceramic substrate has a coefficient of thermal expansion of 11.8ppm/K, there is an improvement in 1st and 2nd level reliabilities associated with thermal stress from device heat generation. At the same time, it possesses a dielectric constant of 5.8, which is conductive with superior electrical performance (high speed and high frequency). Thus, this glass ceramic substrate is capable of supporting increases in current density, while sustaining high reliability.
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