During 28nm technology node process development, a couple of dozens new thin films and advanced thin film processes have been introduced to meet needs of the CMOS circuit performance. These new films and processes are used for micro-patterning, gap-fill, high-k metal gate (HKMG) work function metals and electrodes, electrical and reliability performance, etc. This article shall report the latest progress in thin film developments at the leading Chinese semiconductor company, SMIC. Some key challenges in the areas mentioned above will be elaborated and various new thin film requirements will be discussed. Examples of some thin film process developments, especially in the micro-patterning, Metal Gate and STI and ILD gap-fill, and HKMG work function tuning, will be provided, and the preliminary results will be presented.
Step Coverage and/or Gap-Fill ChallengesSatisfactory step coverage and successful gap-fills have been achieved at STI, metal gate (MG) 1 , contact ILD, and M1/Mx Cu interconnects, the four critical areas of IC fabrication. In the TaN/Ta Cu barrier process, increased side-wall step coverage is usually required for better reliability, and relatively reduced bottom coverage is required for lower Cu via resistance. In contrast, the step coverage requirements for a CMOS work function (WF) metal, TiAl in NMOS as an example, is reversed and a much reduced sidewall coverage is preferred to benefit the MG gap-fill complex. A flattened bottom PVDTiAl film, rather than a dome shaped one, which is against the PVD process nature, must be obtained to eliminate its negative impact on the Vt variation. The MG trench entrance damage needs to be well controlled to form an acceptable incoming profile in the subsequent gap-fill. This flat bottom step coverage requirement in the TiAl film has raised new challenges for PVD sputtering. An experimental DOE was carried out to carefully tune the gas pressure, power, bias/source power ratio, etc, so that desired TiAl step coverage and subsequent void-free gap-fill were obtained, however, the gap-fill physical images are purposely not present here.Generically STI gap-fill is always challenging due to its high aspect ratio (AR). At 28nm, the gap-fill aspect ratios (AR) is 6 -7 when its patterning hard mask (HM) films are taken into account and the STI trench target CD is at ~ 60nm. Figure 1 below shows a typical incoming STI trench profile. For a complete gap-fill, it is necessary to have a HM recess by a wet chemical to widen the STI trench opening, followed by a deposition of ~ 200A oxide liner film. After the liner film, a commercially available SiCoNi dry etch