Oversampled analog-to-digital (A D) converter architectures offer a means of exchanging resolution in time for that in amplitude so as to avoid the difficulty of implementing complex precision analog circuits. These architectures thus represent an attractive approach to implementing precision A/D converters in scaled digital VLSI technologies. This paper examines the practical design criteria for implementing oversampled converters based on second-order sigma-delta (ZA) modulation. Behavioral models that include representation of various circuit impairments are established for each of the functional building blocks comprising a second-order 2 A modulator. Extensive simulations based on these models are then used to establish the major design criteria for each of the building blocks. As an example, these criteria are applied to the design of a modulator that has been integrated in a 3-pm CMOS technology. This experimental prototype operates from a single 5-V supply, dissipates 12 mW, occupies an area of 0.77 m d , and achieved a measured dynamic range of 89 dB.

Controlling the charge, rather than the voltage, on a parallel-plate, electrostatic actuator theoretically permits stable operation for all deflections. Practically, we show that, using charge control, the maximum stable deflection is limited by 1) charge pull-in, in which the actuator snaps due to the presence of parasitic capacitance and 2) tip-in, in which the rotation mode becomes unstable. This work presents a circuit that controls the amount of charge on a parallel-plate, electrostatic actuator. This circuit reduces the sensitivity to parasitic capacitance, so that tip-in is the limiting instability. A small-signal model of the actuator is developed and used to determine the circuit bandwidth and gain requirements for stable deflections. Four different parallel-plate actuators have been designed and tested to verify the charge control technique as well as to verify charge pull-in, tip-in, and the bandwidth requirements. One design travels 83% of the gap before tip-in. Another design can only travel 20% of the gap before tip-in, regardless of whether voltage control or charge control is used.

No abstract

Surface micromachining has enabled the co-fabrication of thin-film micromechanical structures and CMOS or Bipolar/MOS integrated circuits. Using linear, singleaxis accelerometers as a motivating example, this paper discusses the fundamental mechanical noise floor as well as the electronic noise floors for representative capacitive position-sensing interface circuits. Operation in vacuum lowers the Brownian noise of a polysilicon accelerometer to below lpg/&.For improved sensor performance, the position of the microstructure should be controlled using electrostatic force-feedback. Both analog and digital closed-loop accelerometers are described and contrasted, with the latter using high-frequency voltage pulses to apply force quanta t o the microstructure and achieve a very linear response. 15.1.215.1.7

A dual mass vibratory gyroscope sensor demonstrates the quadrature frequency modulated (QFM) operating mode, where the frequency of the circular orbit of a proof mass is measured to detect angular rate. In comparison to the mode-matched open loop rate mode, the QFM mode receives the same benefit of improved SNR but without the penalties of unreliable scale factor and decreased bandwidth. A matched pair of gyroscopes, integrated onto the same die, is used for temperature compensation, resulting in 6 ppb relative frequency tracking error, or an Allan deviation of 370 deg/hr with a 70 kHz resonant frequency. The integrated CMOS electronics achieve a capacitance resolution of 0.1 zF/rt-Hz with nominal 6 fF sense electrodes.