Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach. The circuits' devices are populated with individual defects, which have realistic carrier-capture and emission behaviour. The wide distribution of defect time scales, accounts for both fast (Random Telegraph Noise -RTN) and near-permanent (Bias Temperature Instability -BTI) defects. The atomistic property of the model allows the detection of workload dependency in the delay of both circuits. Index Terms-Bias-temperature instability (BTI), circuit simulations, parametric reliability, random telegraph noise (RTN), static random access memory (SRAM), workload dependency
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