Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach. The circuits' devices are populated with individual defects, which have realistic carrier-capture and emission behaviour. The wide distribution of defect time scales, accounts for both fast (Random Telegraph Noise -RTN) and near-permanent (Bias Temperature Instability -BTI) defects. The atomistic property of the model allows the detection of workload dependency in the delay of both circuits. Index Terms-Bias-temperature instability (BTI), circuit simulations, parametric reliability, random telegraph noise (RTN), static random access memory (SRAM), workload dependency
Transistor reliability has become one of the major concerns in reliable circuit design in advanced CMOS nanometer technology. Transistor aging can have a significant impact on the performance of the RF frontend circuits. In this paper, the impacts of transistor aging on a RF low noise amplifier (LNA) are studied. In this work, single-ended cascode LNA with source inductive degeneration and LC folded-cascode LNA test circuits are used to study the transistor aging effect. The noise figure (NF) and the gain, critical performance parameters of a LNA are shown to be degradation-sensitive. It is shown that the noise figure of the LNA is significantly increased and the gain of the LNA is decreased by the aging effect using a 28nm technology. The optimum gate bias point and the cascode structure have been shown as design guidelines to make the LNA more reliable.I.
Some applications in scientific imaging, like spacebased high-precision photometry, benefit from a detailed characterization of the sensitivity variation within a pixel. A detailed map of the intra-pixel sensitivity (IPS) allows to increase the photometric accuracy by correcting for the impact of the tiny sub-pixel movements of the image sensor during integration. This paper reports the measurement of the sub-pixel sensitivity variation and the extraction of the IPS map of a front-side illuminated CMOS image sensor with a pixel pitch of 6 µm. Our optical measurement setup focuses a collimated beam onto the imaging surface with a microscope objective. The spot was scanned in a raster over a single pixel to probe the pixel response at each (sub-pixel) scan position. We model the optical setup in ZEMAX to cross-validate the optical spot profile described by an Airy diffraction pattern. In this work we introduce a forward modeling technique to derive the variation of the IPS. We model the optical spot scanning system and discretize the CMOS pixel response. Fitting this model to the measured data allows us to quantify the spatial sensitivity variation within a single pixel. Finally, we compare our results to those obtained from the more commonly used Wiener deconvolution.
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