In this paper, we present an approach of measuring the SET kinetics of redox-based resistive memories at timescales below 100 ps. Automatic measurements with an RF pulse generator and a source measure unit allow the consecutive application of short electrical pulses and the precise detection of the device resistance. In addition, a statistical evaluation of the SET kinetics has been performed. By increasing the pulse duration in small steps, varying the pulse amplitude and collecting a comprehensive dataset, the transient resistance of a device can be determined at a picosecond timescale. With this setup, we measured the SET kinetics of two different valence change memory-based resistive switching oxides, namely, TaOx and ZrOx, between 50 ps and 250 ps. Two characteristic times were measured: the SET time, being the delay after which the transition to the low resistance state sets in, and the transition time, which is the timespan during which the resistance shifts from the high to the low resistive state. We measured SET times down to 50 ps and transition times below 15 ps for both materials. The intrinsic maximum switching speed is not reached yet, which is limited by the ion migration in the oxides, possibly corresponding to the phonon THz frequency. Although charging times and heating times potentially slow down the measured SET times, they still allow 50 ps writing times at voltages of less than 5.0 V.

This study investigates resistive switching in amorphous undoped and Cr-doped vanadium oxide thin films synthesized by sputtering deposition at low oxygen partial pressure. Two different volatile threshold switching characteristics can occur as well as a non-volatile bipolar switching mechanism, depending on device stack symmetry and Cr-doping. The two threshold switching types are associated with different crystalline phases in the conduction filament created during an initial forming step. The first kind of threshold switching, observed for undoped vanadium oxide films, was, by its temperature dependence, proven to be associated with a thermally triggered insulatorto-metal transition in a crystalline VO 2 phase, whereas the threshold switch observed in chromium doped films is stable up to 90 C and shows characteristics of an electronically induced Mott transition. This different behaviour for undoped versus doped films has been attributed to an increased stability of V 3þ due to the Cr 3þ doping (as evidenced by X-ray photoelectron spectroscopy analysis), probably favouring the creation of a crystalline Cr-doped V 2 O 3 phase (rather than a Cr-doped VO 2 phase) during the energetic forming step. The symmetric Pt/a-(VCr)O x /Pt device showing high temperature stable threshold switching may find interesting applications as a possible new selector device for resistive switching memory (ReRAM) crossbar arrays.

No abstract

Current-voltage characteristics of oxide-based resistive switching memories often show a pronounced asymmetry with respect to the voltage polarity in the high resistive state (HRS), where the HRS after the RESET is more conducting than the one before the SET. Here, we report that most of this HRS asymmetry is a volatile effect as the HRS obtained from a read operation differs from the one taken from the switching cycle at identical polarity and voltages. Transitions between the relaxed and the volatile excited states can be achieved via voltage sweeps, which are named subloops. The excited states are stable over time as long as a voltage is applied to the device and have a higher conductance than the stable relaxed state. Experimental data on the time and voltage dependence of the excitation and decay are presented for Ta/TaO/Pt and Ta/ZrO/Pt devices. The effect is not limited to one oxide or electrode material but is observed with different magnitudes (up to 10× current change) in several oxide systems. These observations describe an additional state variable of the memristive system that is controlled in a highly polarity dependent manner.

This work investigates the oxygen exchange at the oxide/electrode interface in ReRAM devices and its influence on the forming behaviour.

During the past decade, valence change memory (VCM) has been extensively studied due to its promising features, such as a high endurance and fast switching times. The information is stored in a high resistive state (HRS) and a low resistive state (LRS). It can also be operated in two different writing schemes, namely a unipolar switching mode (LRS and HRS are written at the same voltage polarity) and a bipolar switching mode (LRS and HRS are written at opposite voltage polarities). VCM, however, still suffers from a large variability during writing operations and also faults occur, which are not yet fully understood and, therefore, require a better understanding of the underlying fault mechanisms. In this study, a new intrinsic failure mechanism is identified, which prohibits RESET times (transition from LRS to HRS) faster than 400 ps and possibly also limits the endurance. We demonstrate this RESET speed limitation by measuring the RESET kinetics of two valence change memory devices (namely Pt/TaO x /Ta and Pt/ZrO x /Ta) in the time regime from 50 ns to 50 ps, corresponding to the fastest writing time reported for VCM. Faster RESET times were achieved by increasing the applied pulse voltage. Above a voltage threshold it was, however, no longer possible to reset both devices. Instead a unipolar SET (transition from HRS to LRS) event occurred, preventing faster RESET times. The occurrence of the unipolar SET is attributed to an oxygen exchange at the interface to the Pt electrode, which can be suppressed by introducing an oxygen blocking layer at this interface, which also allowed for 50 ps fast RESET times.

The switching mechanism of valence change resistive memory devices is widely accepted to be an ionic movement of oxygen vacancies resulting in a valence change of the metal cations. However, direct experimental proofs of valence changes in memristive devices are scarce. In this work, we have employed hard X-ray photoelectron emission microscopy (PEEM) to probe local valence changes in Pt/ZrOx/Ta memristive devices. The use of hard X-ray radiation increases the information depth, thus providing chemical information from buried layers. By extracting X-ray photoelectron spectra from different locations in the PEEM images, we show that zirconia in the active device area is reduced compared to a neighbouring region, confirming the valence change in the ZrOx film during electroforming. Furthermore, we succeeded in measuring the Ta 4f spectrum for two different resistance states on the same device. In both states, as well as outside the device region, the Ta electrode is composed of different suboxides without any metallic contribution, hinting to the formation of TaOx during the deposition of the Ta thin film. We observed a reduction of the Ta oxidation state in the low resistance state with respect to the high resistive state. This observation is contradictory to the established model, as the internal redistribution of oxygen between ZrOx and the Ta electrode during switching would lead to an oxidation of the Ta layer in the low resistance state. Instead, we have to conclude that the Ta electrode takes an active part in the switching process in our devices and that oxygen is released and reincorporated in the ZrOx/TaOx bilayer during switching. This is confirmed by the degradation of the high resistance state during endurance measurements under vacuum.

The inevitable variability within electronic devices causes strict constraints on operation, reliability and scalability of the circuit design. However, when a compromise arises among the different performance metrics, area, time and energy, variability then loosens the tight requirements and allows for further savings in an alternative design scope. To that end, unconventional computing approaches are revived in the form of approximate computing, particularly tuned for resource-constrained mobile computing. In this paper, a proof-of-concept of the approximate computing paradigm using memristors is demonstrated. Stochastic memristors are used as the main building block of probabilistic logic gates. As will be shown in this paper, the stochasticity of memristors’ switching characteristics is tightly bound to the supply voltage and hence to power consumption. By scaling of the supply voltage to appropriate levels stochasticity gets increased. In order to guide the design process of approximate circuits based on memristors a realistic device model needs to be elaborated with explicit emphasis of the probabilistic switching behavior. Theoretical formulation, probabilistic analysis, and simulation of the underlying logic circuits and operations are introduced. Moreover, the expected output behavior is verified with the experimental measurements of valence change memory cells. Hence, it is shown how the precision of the output is varied for the sake of the attainable gains at different levels of available design metrics. This approach represents the first proposition along with physical verification and mapping to real devices that combines stochastic memristors into unconventional computing approaches.