Volatile HRS asymmetry and subloops in resistive switching oxides

Abstract

Current-voltage characteristics of oxide-based resistive switching memories often show a pronounced asymmetry with respect to the voltage polarity in the high resistive state (HRS), where the HRS after the RESET is more conducting than the one before the SET. Here, we report that most of this HRS asymmetry is a volatile effect as the HRS obtained from a read operation differs from the one taken from the switching cycle at identical polarity and voltages. Transitions between the relaxed and the volatile excited states can be achieved via voltage sweeps, which are named subloops. The excited states are stable over time as long as a voltage is applied to the device and have a higher conductance than the stable relaxed state. Experimental data on the time and voltage dependence of the excitation and decay are presented for Ta/TaO/Pt and Ta/ZrO/Pt devices. The effect is not limited to one oxide or electrode material but is observed with different magnitudes (up to 10× current change) in several oxide systems. These observations describe an additional state variable of the memristive system that is controlled in a highly polarity dependent manner.

2D Resistive Switching Based on Amorphous Zinc–Tin Oxide Schottky Diodes

“…Further proof is required to discuss whether the trapping/detrapping at the Pt/ZTO interface [15] or the ionic motion (oxygen exchange with the platinum) [14] is the dominant mechanism. Besides the 2D RS mode, the devices also worked in a filamentary VCM-type resistive switching mode (1D RS) controlled by intrinsic dopants such as oxygen vacancies (temperature coefficient of resistance at the LRS: 6.5 × 10 −4 K −1 ).…”

“…[11,12] This can be referred to as 3D RS. [14][15][16][17] In addition, the choice between digital and analog operation modes by different device initialization schemes has been reported for NiO-based devices. [13] Another type of area-dependent RS exists when ions are exchanged (or trapping occurs at the interface) between the switching matrix and the electrode.…”

“…The direction of the switching loops is opposite to 1D RS and 3D RS, that is, eightwise (8w) when the bias is applied to the current blocking electrode. [15] To allow a sizeable data retention, structural stabilization of the trapped charge needs to occur. [14][15][16][17] In addition, the choice between digital and analog operation modes by different device initialization schemes has been reported for NiO-based devices.…”

“…[19] In the case of Ti/Pr 0.7 Ca 0.3 MnO 3 (PCMO) devices the underlying mechanism is based on a redox reaction between the titanium oxide interlayer and the PCMO. [15] To allow a sizeable data retention, structural stabilization of the trapped charge needs to occur. [15] To allow a sizeable data retention, structural stabilization of the trapped charge needs to occur.…”

“…[14][15][16][17] In addition, the choice between digital and analog operation modes by different device initialization schemes has been reported for NiO-based devices. The direction of the switching loops is opposite to 1D RS and 3D RS, that is, eightwise (8w) when the bias is applied to the current blocking electrode.…”