This paper describes the analysis and design of saturated silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) switches for millimeter-wave applications. A switch optimization procedure is developed based on detailed theoretical analysis and is then used to design multiple switch variants. The switches utilize IBM's 90-nm 9HP technology, which features SiGe HBTs with peak of 300/350 GHz. Using a reverse-saturated configuration, a single-pole double-throw switch with a measured insertion loss of 1.05 dB and isolation of 22 dB is achieved at 94 GHz after de-embedding pad losses. The switch draws 5.2 mA from a 1.1-V supply, limiting power consumption to less than 6 mW. The switching speed is analyzed and the simulated turn-on and turn-off times are found to be less than 200 ps. A technique is also introduced to significantly increase the power-handling capabilities of saturated SiGe switches up to an input-referred 1-dB compression point of 22 dBm. Finally, the impact of RF stress on this novel configuration is investigated and initial measurements over a 48-h period show little performance degradation. These results demonstrate that SiGe-based switches may provide significant benefits to millimeter-wave systems.Index Terms-Millimeter wave, 94 GHz, reverse saturation, saturation, silicon-germanium (SiGe) heterojunction bipolar transistor (HBT), single-pole double throw (SPDT), switch, transformer.
The design of a radiation-efficient D-band end-fire onchip antenna utilizing a localized backside etching (LBE) technique, as well as an antenna-in-package (AiP) on a low-cost organic substrate is presented. Quasi-Yagi-Uda antennas are chosen for end-fire radiation because of their compact size. The on-chip antenna is realized in the back-end of the line (BEOL) process of a 130 nm SiGe BiCMOS technology, while the inpackage antenna is realized in liquid crystal polymer technology for comparison. The on-chip antenna design is optimized to meet both process reliability specifications and radiation performance, and corresponding design guidelines are provided. The fabricated on-chip antennas show state-of-the-art performance with a peak gain of 4.7 dBi and, simulated radiation efficiency of 82%, and measured radiation efficiency of 72-76% using the Gain/Directivity and Wheeler-cap methods at 143 GHz. The antenna demonstrates a 3-dB gain bandwidth of more than 30 GHz and 10-dB impedance bandwidth greater than 20 GHz (14% impedance bandwidth). The measurements of the onpackage end-fire antenna showed very comparable results with a peak measured gain of 6 dBi and a simulated and measured radiation efficiency of 92% and 86% at 143 GHz. These results demonstrate that highly efficient on-chip end-fire antenna implementation is possible in standard commercially available BiCMOS process.
Index Terms-Antenna-in-package (AiP), liquid crystal polymer (LCP), localized back-side etching, mm-waves, micromachining, on-chip antenna, SiGe BiCMOS 0018-926X (c)
In this paper, a fully integrated wideband 240-GHz transceiver front-end, supporting BPSK modulation scheme, with on-chip antenna is demonstrated in SiGe:C BiCMOS technology with f T / f max = 300/500 GHz and local backside etching option. Within the transmitter, the upconversion is provided by fundamental mixing using a modified Gilbert cell mixer driven by a multiplier-by-eight local oscillator (LO) chain. The transmitter achieves a 3-dB RF bandwidth of 35 GHz with a saturated output power of −0.8 dBm. The down converter is equipped with a mixer first architecture. The mixer is designed utilizing a transimpedance amplifier as load for enhanced noise and bandwidth performance. For dc-coupled receiver, two dc offset cancellation loops are implemented within the receiver chain. It achieves a 3-dB RF bandwidth of 55 GHz, minimum singlesideband noise figure (SSB NF) of 13.4 dB, and a gain of 32 dB with 25-dB gain control. A wideband on-chip double-folded dipole antenna and an on-board optical lens are utilized to demonstrate a wireless link achieving 20-and 25-Gb/s data rates at bit error rates (BERs) of 6.3 × 10 −6 and 2.2 × 10 −4 , respectively, across a distance of 15 cm. The transmitter and receiver consume 375 and 575 mW, respectively, which correspond to power efficiencies of 15 pJ/bit for the transmitter and 23 pJ/bit for the receiver. They occupy a silicon area of 4.3 and 4.5 mm 2 , respectively.
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