Wafers from three heights and two different lateral positions (corner and centre) of four industrial multicrystalline silicon ingots were analysed with respect to their grain structure and dislocation density. Three of the ingots were non-seeded and one ingot was seeded. It was found that there is a strong correlation between the ratio of the densities of (coincidence site lattice) CSL grain boundaries and high angle grain boundaries in the bottom of a block and the dislocation cluster density higher in the block. In general, the seeded blocks, both the corner and centre block, have a lower dislocation cluster density than in the non-seeded blocks, which displayed a large variation. The density of the random angle boundaries in the corner blocks of the non-seeded ingots was similar to the density in the seeded ingots, while the density in the centre blocks was lower. However, the density of CSL boundaries was higher in all the non-seeded than in the seeded ingots. It appears that both of these grain boundary densities influence the presence of dislocation clusters, and we propose they act as dislocation sinks and sources, respectively. The ability to generate small grain size material without seeding appears to be correlated to the morphology of the coating, which is generally rougher in the corner positions than in the middle. Furthermore, the density of twins and CSL boundaries depends on the growth mode during initial growth and thus on the degree of supercooling. Controlling both these properties is important in order to be able to successfully produce uniform quality high-performance multicrystalline silicon by the advantageous non-seeding method.

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Analysis of structured wire wafering processes to predict optimized process settings by varying particle size and wire diameter AIP Conference Proceedings 1999, 140001 (2018) Abstract. The Diamond wire slicing process for multi-Si wafering is relatively new, and there are limited threedimensional thermal field simulations in this area. This work aims to fill the gap by using a Finite-Element model to simulate this complex mechanical-thermal process where the wires and wafers are continuously working in a thermally expanded region of the block. The non-uniform three-dimensional temperature field generated in the block leads to uneven contraction and deformation of wafers, which may impact on wafer strength. This process is not well understood. The model accounts for important slicing parameters such as cooling fluid flow rate, temperature difference, block length and wafer thickness in real production environment. It predicts a three-dimensional thermal field, and also quantifies wafer expansion/contraction at different places in a block. The obtained results can potentially help to optimize slicing recipe for better wafer strength and morphology, and to produce high quality wafers for solar panels.