A technique to measure low frequency noise in illuminated photodiodes is presented, and some 1/f noise results are given for InGaAs devices. The ability of photodiodes to convert laser noise into RF noise is also discussed, together with other types of 1/f noise arising directly from the optical fiber, and particularly from scattering phenomena inside the fiber.
A compact reconfigurable CMOS low-noise amplifier (LNA) is presented for applications in DCS1800, UMTS, WLAN-b/g and Bluetooth standards. The proposed LNA features first a current reuse shunt-feedback amplifier for wideband input matching, low-noise figure and small area. Secondly, a cascode amplifier with a tunable active LC resonator is added for high gain and continuous tuning of bands. Fabricated in a 0.13 μm CMOS process, the measured results show >20 dB power gain, <3.5 dB noise figure in the frequency range of 1.8-2.4 GHz, return losses S 11 and S 22 lower than −12 and −14 dB, respectively, with a moderate IIP3 of −11.8 dBm at 2.4 GHz. It consumes 9.6 mW from a 1.2 V supply voltage, while occupying an active silicon area of only 0.052 mm 2 .
This work provides a new co‐design methodology of ultrawide band (UWB) low‐noise amplifier (LNA) with high out of band interference cancellation. The solution consists to cascade a selective microstrip UWB bandpass filter (BPF) with the proposed 0.18 µm complementary metal–oxide–semiconductor‐based LNA. Indeed, the usefulness of this co‐design technique is to address the interference mitigation through the BPF and amplification function by using the LNA. The proposed solution remains powerful since the out of band interferences are well avoided with an efficient amplification performance while well fulfilling UWB requirements, i.e. good matching over a wide bandwidth from 3.2 to 10.64 GHz, 17 dB of power gain (S21), the noise figure varies between 2.5 and 5.7 dB, and the dissipated power (PDC) is typically 16.5 mW. It is relevant to point out that the computed figure‐of‐merit of the proposed circuit is 29.03 which is very competitive compared with state‐of‐the art.
This article presents the design and implementation of a multi-stage radio-frequency (RF) passive polyphase filter (PPF). The layout parasitics and mismatch which deteriorate significantly the RF filter performance are analyzed and modeled. To reduce this parasitic degradation, a novel optimal layout technique is proposed. It is based on reproducing the same optimized PPF stage layout for the different stages while the desired bandwidth is ensured due to an optimal sizing of the inter-stages connections. This approach has been validated with on chip measurements. Using the proposed techniques more than 55 dB of image rejection over the [1.5; 3.3] GHz bandwidth is demonstrated while achieving zero power consumption and small silicon area in 130nm CMOS technology.
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