A new reduced clock-swing flip-flop, named NAND-type Keeper Hip-Fiop(NDKFF) is proposed. Compared with other conventional reduced clock-swing flip-flops such as HSFF and RCSFF, NDKFF features simple configuration, which does not have additional clock drivers or does not have additional n-a d o r pwells. Compared with the hybrid-latch flip-flop, 52% of the flip-flop power and 64% of the clocking power are saved in the case of 0.25pm CMOS technology. Moreover CLK-to-Q delay is comparable to that of conventional C2MOS-type master-slave flipflop.
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