A.J. Montalvo scite author profile

Gyurcsik

IEEE Trans. Neural Netw.

1997

This paper describes elements necessary for a general-purpose low-cost very large scale integration (VLSI) neural network. By choosing a learning algorithm that is tolerant of analog nonidealities, the promise of high-density analog VLSI is realized. A 64-synapse, 8-neuron proof-of-concept chip is described. The synapse, which occupies only 4900 mum(2) in a 2-mum technology, includes a hybrid of nonvolatile and dynamic weight storage that provides fast and accurate learning as well as reliable long-term storage with no refreshing. The architecture is user-configurable in any one-hidden-layer topology. The user-interface is fully microprocessor compatible. Learning is accomplished with minimal external support; the user need only present inputs, targets, and a clock. Learning is fast and reliable. The chip solves four-bit parity in an average of 680 ms and is successful in about 96% of the trials.

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An analog VLSI neural network with on-chip perturbation learning

Gyurcsik

IEEE J. Solid-State Circuits

1997

Improved floating-gate devices using standard CMOS technology

IEEE Electron Device Lett.

1993

On-chip learning in the analog domain with limited precision circuits

Hollis

Building blocks for a temperature-compensated analog VLSI neural network with on-chip learning

Gyurcsik²,

Paulos³