On-chip learning in the analog domain with limited precision circuits

Montalvo, A.J.; Hollis, P.W.; Paulos, J.J.

doi:10.1109/ijcnn.1992.287136

Cited by 16 publications

(2 citation statements)

References 3 publications

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“…To determine the analog domain precision requirements, we used a function mapping problem with a network with one input, 20 first hidden-layer nodes, six second hidden-layer nodes, and one output [31], [42]. The input to the network was a random number in the interval [ 1,1] and the target was the mapping to the sigmoidal curve shown in Fig.…”

Section: Precision Requirementsmentioning

confidence: 99%

Toward a general-purpose analog VLSI neural network with on-chip learning

Montalvo

Gyurcsik

Paulos

1997

IEEE Trans. Neural Netw.

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This paper describes elements necessary for a general-purpose low-cost very large scale integration (VLSI) neural network. By choosing a learning algorithm that is tolerant of analog nonidealities, the promise of high-density analog VLSI is realized. A 64-synapse, 8-neuron proof-of-concept chip is described. The synapse, which occupies only 4900 mum(2) in a 2-mum technology, includes a hybrid of nonvolatile and dynamic weight storage that provides fast and accurate learning as well as reliable long-term storage with no refreshing. The architecture is user-configurable in any one-hidden-layer topology. The user-interface is fully microprocessor compatible. Learning is accomplished with minimal external support; the user need only present inputs, targets, and a clock. Learning is fast and reliable. The chip solves four-bit parity in an average of 680 ms and is successful in about 96% of the trials.

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Section: Precision Requirementsmentioning

confidence: 99%

Toward a general-purpose analog VLSI neural network with on-chip learning

Montalvo

Gyurcsik

Paulos

1997

IEEE Trans. Neural Netw.

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“…In particular the presence of various offset errors are problematic. It is not the purpose of the present paper to deal with these matters, though, which have been the concern of other authors (see [12] and [13]). …”

Section: Test Of Algorithmmentioning

confidence: 90%

Nonlinear backpropagation: doing backpropagation without derivatives of the activation function

Hertz

Krogh

Lautrup

et al. 1997

IEEE Trans. Neural Netw.

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Abstract-The conventional linear backpropagation algorithm is replaced by a nonlinear version, which avoids the necessity for calculating the derivative of the activation function. This may be exploited in hardware realizations of neural processors. In this paper we derive the nonlinear backpropagation algorithms in the framework of recurrent backpropagation and present some numerical simulations of feedforward networks on the NetTalk problem. A discussion of implementation in analog very large scale integration (VLSI) electronics concludes the paper.

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