Indium phosphide nanowires were grown by metalorganic molecular beam epitaxy using the selective-area vapor-liquid-solid method. We show experimentally and theoretically that the size of the annular opening around the nanowire has a major impact on nanowire growth rate. In addition, we observed a considerable reduction of the growth rate in dense two-dimensional arrays, in agreement with a calculation of the shadowing of the scattered precursors. Due to the impact of these effects on growth, they should be considered during selective-area vapor-liquid-solid nanowire epitaxy.
The resistive switching effect in metal oxides and other dielectric materials is among the leading future non-volatile memory technologies. Resistive switching is widely ascribed to the formation and rupture of conductive filaments in the oxide, which are generated by temperature-enhanced nano-scale ion migration or other thermal effects. In spite of the central role of the local filament temperature on the switching effect, as well as on the conduction and reliability physics, no measurement methods of the filament temperature are yet available. In this work, we report on a method for evaluating the conducting filament temperature, using a metal-insulator-semiconductor bipolar transistor structure. The filament temperature is obtained by analyzing the thermal excitation rate of electrons from the filament Fermi level into the conduction band of a p-type semiconductor electrode. Measurements were carried out to obtain the conductive filament temperature in hafnia at varying ambient temperatures in the range of 3-300 K. Significant Joule heating of the filament was observed across the entire measured ambient temperature range. The extracted temperatures provide physical insight into the resistive switching effect.
Temperature dependent capacitance–voltage (C-V) and conductance-voltage (G-V) measurements were performed to obtain activation energies (EA) for weak inversion C-V humps and parallel conductance peaks in Al2O3/InGaAs and Si3N4/InGaAs gate stacks. Values of 0.48 eV (slightly more than half of the band gap of the studied In0.53Ga0.47As) were obtained for EA of both phenomena for both gate dielectrics studied. This indicates an universal InGaAs behavior and shows that both phenomena are due to generation-recombination of minority carriers through near midgap located interface states. The C-V hump correlates with the interface states density (Dit) and can be used as a characterization tool for dielectric/InGaAs systems.
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