The properties of gold Schottky barriers on the GaAs(110) surface were measured to determine the influence of atomic order, cleanliness and surface processing. Clean and ordered surfaces were prepared by ion bombardment and thermal annealing. Their chemical condition was monitored by AES and their atomic order by LEED. Some surfaces were subsequently disordered by further ion bombardment or by exposure to oxygen; others were not subjected to any further processing. Gold dots were evaporated on all surfaces without breaking the UHV. No significant differences among barrier height values measured by internal photoemission were observed, suggesting Fermi-level pinning for all junctions. Major and consistent differences in capacitance–voltage and in current–voltage measurements were found between clean and ordered surfaces, and disordered surfaces. The experimental results indicate that transport across the barriers is very sensitive to inhomogeneities in the layers adjacent to the metallurgical junction introduced during the various steps employed in cleaning and ordering the surface. Chemical polishing, sputter etching and annealing all affect the stoichiometry at the surface. Annealing by itself appears to produce an intrinsic layer and while it results in ordering of the surface, it does not eradicate defects and other spatial inhomogeneities, nor the drastic changes in the electronic properties which are introduced in the surface by sputtering. Surfaces may have the same structure and ordering, yet differ widely in their electronic properties. Seeming inconsistencies among results of different measurement methods are ascribed to the fact that each method probes a different region and is sensitive to different conditions.

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The temperature dependence of I-V curves of thin-film polycrystalline CdS/Cu2S heterojunctions was investigated as a function of heat treatment applied to them. Prior to any heat treatment, the space charge in the CdS is narrow enough so that electrons can tunnel from the bottom of its conduction band and the tunneling current is temperature independent. Considerable Ohmic shunting is caused by thin layers of Cu2S which had formed along the grain boundaries. After heat treatment, the space charge in the CdS widened due to diffusion of Cu from the Cu2S, so that electrons in CdS now require an activation energy to tunnel, and this results in a temperature-dependent tunneling current. Furthermore, the thin layers of Cu2S disappeared from the grain boundaries, thus eliminating the shunting paths which had existed prior to the heat treatment.