Xuantie-910: Innovating Cloud and Edge Computing by RISC-V

Chen, Chen; Xiang, Xiaoyan; Liu, Chang; Shang, Yunhai; Guo, Ren; Liu, Dongqi; Lu, Yimin; Hao, Ziyi; Luo, Jun; Chen, Zhijjan; Li, Chunqiang; Pu, Yu; Meng, Jianyi; Yan, Xiao; Xie, Yuan; Qi, Xiaoning

doi:10.1109/hcs49909.2020.9220630

Cited by 9 publications

(2 citation statements)

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“…In recent years, RISC-V has been used to develop highperformance computing processors, and potential application scenarios include smartphones, laptops, cloud computing, and supercomputing, etc. For instance, Alibaba T-Head released the XuanTie C910 [30] RISC-V CPU and realized the adaptation of Android 12.0 system in 2020. MIPS released eVocore, a series of multi-core-multi-cluster processors for datacenter and high-performance applications, in 2022.…”

Section: High Performance Processormentioning

confidence: 99%

RISC-V Instruction Set Architecture Extensions: A Survey

Cui

Qian

2023

IEEE Access

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RISC-V is an open-source and royalty-free instruction set architecture (ISA), which opens up a new era of processor innovation. RISC-V has the characteristics of modularization and extensibility, and explicitly supports domain-specific custom extensions. Nowadays, RISC-V is a popular ISA for embedded processors. However, there is still a gap between the capabilities of RISC-V and the requirements of various emerging computing scenarios (e.g., artificial intelligence, cloud computing). Recently, the RISC-V standards organization has continuously introduced new ISA extensions to meet the needs of advanced computing. There are also a variety of novel research proposed customized extensions of RISC-V for certain scenarios. As far as we know, there is a lack of a survey to systematically present the research progress of RISC-V ISA extensions. The goal of this paper is to provide a comprehensive survey on existing works about RISC-V ISA extensions. First, the application scenarios of RISC-V are introduced, and the requirements for ISA extensions are analyzed. Then, we survey the progress of official RISC-V ISA extension specification and recent research on RISC-V ISA extension. Finally, we highlight some possible future research opportunities on the RISC-V ISA extension.INDEX TERMS RISC-V, instruction set architecture, extensions, survey.

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Section: High Performance Processormentioning

confidence: 99%

RISC-V Instruction Set Architecture Extensions: A Survey

Cui

Qian

2023

IEEE Access

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“…SiFive RISC-V cores have already been used for SSD Controllers [4]. Alibaba has taped out Xuantie-910 for cloud and edge computing [5]. Other tape-outs and FPGA boards include Microchip PolarFire SoC FPGA Icicle Kit, RISC-V multicore accelerator SoC BlackParrot [6], Xilinx multi-core FPGA system VC707 [7] etc.…”

Section: Introductionmentioning

confidence: 99%

A Survey on RISC-V Security: Hardware and Architecture

2021

Preprint

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The Internet of Things (IoT) is an ongoing technological revolution. Embedded processors are the processing engines of smart IoT devices. For decades, these processors were mainly based on the Arm instruction set architecture (ISA). In recent years, the free and open RISC-V ISA standard has attracted the attention of industry and academia and is becoming the mainstream. Many companies have already owned or are designing RISC-V processors. Many important operating systems and major tool chains have supported RISC-V. Data security and user privacy protection are common challenges faced by all IoT devices. In order to deal with foreseeable security threats, the RISC-V community is studying security solutions aimed at achieving a root of trust (RoT) and ensuring that sensitive information on RISC-V devices is not tampered with or leaked. Many RISC-V security research projects are underway, but the academic community has not yet conducted a comprehensive survey of RISC-V security solutions. The latest technology and future development direction of RICS-V security research are still unclear. In order to fill this research gap, this paper presents an in-depth survey on RISC-V security technologies. This paper summarizes the representative security mechanisms of RISC-V hardware and architecture. Specifically, we first briefly introduce the background and development status of RISC-V, and compare the RISC-V mechanisms with the most relevant Arm mechanisms, highlighting their similarities and differences. Then, we investigate the security research of RISC-V around the theme of hardware and architecture security. Our survey covers hardware and physical access security, hardware-assisted security units, ISA security extensions, memory protection, cryptographic primitives, and side-channel attack protection. Based on our survey, we predict the future research and development directions of RISC-V security. We hope that our research can inspire RISC-V researchers and developers.CCS Concepts: • Security and privacy → Embedded systems security; Cryptography.

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Soc Design of Intelligent Recognition Based on RISC-V

Xiao

et al. 2022

2022 International Conference on Automation, Robotics and Computer Engineering (ICARCE)

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Xuantie-910: Innovating Cloud and Edge Computing by RISC-V

Cited by 9 publications

References 0 publications

RISC-V Instruction Set Architecture Extensions: A Survey

RISC-V Instruction Set Architecture Extensions: A Survey

A Survey on RISC-V Security: Hardware and Architecture

Soc Design of Intelligent Recognition Based on RISC-V

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