Wide-ranging control of carrier lifetimes in n-type 4H-SiC epilayer by intentional vanadium doping

Abstract

Wide-ranging control of carrier lifetimes in n-type epilayers by vanadium (V) doping is attempted toward not only developing a buffer layer to prevent the stacking fault expansion but also improving switching loss in 4H-SiC-based bipolar devices. Control of V doping concentrations in lightly and highly nitrogen (N)-doped epilayers was achieved within the range of 1012–1015 cm−3 by changing the input flow rates of vanadium tetrachloride. Photoluminescence (PL) and deep-level transient spectroscopy analyses revealed that incorporated V atoms create the PL bands within the range of 0.8–1.0 eV, and densities of the deep center at the V3+/4+ acceptor level (Ec − 0.97 eV) increase linearly with V doping concentrations. Accordingly, V doping shortens the minority carrier lifetimes in lightly N-doped epilayers from 3 μs to 40 ns as well as lifetimes in highly N-doped epilayers down to 20 ns at 20 °C, achieving intrawafer carrier lifetime uniformities of 3–10% σ/mean. Furthermore, V doping during epitaxial growth exhibited a nonsignificant memory effect and the V-doped epilayers showed high thermal stability against postprocessing by 1700 °C. We also demonstrated PiN diodes with a 2.4 μm-thick N + V-doped buffer layer (N: 1 × 1018 and V: 1 × 1014 cm−3), showing no degradation after a stress test for 1 h under a direct current density of 600 A/cm2.

Effects of proton implantation for expansion of basal plane dislocations in SiC toward suppression of bipolar degradation: review and perspective

“…BPDs in the substrates expand to 1SSFs when the minority carrier injection from the epitaxial layers is significant. [29][30][31][32][33][34][35] For example, in the MOSFETs with vertical structures based on SiC have p-n diode structures between the source and drain contacts, the p-n diodes temporarily turn on at the initial state of turn-off of the MOSFET during operation in electronic circuits. The turned-on p-n diodes induce the expansion of BPDs in the substrates to 1SSFs.…”

“…Therefore, there is a strong demand to develop techniques to suppress BPD expansion and maintain the reliability of SiC devices; accordingly, various suppression methods, such as utilization of BPD-free substrates, 1,36) devices embedded with Schottky barrier diodes (SBDs) 26,[37][38][39][40] and carrier lifetime control, [31][32][33][34][35]41,42) have been proposed. Although the utilization of BPD-free substrates offers an optimal solution for mitigating bipolar degradation, 1) the corresponding wafer production process is significantly costly.…”

“…Another approach is the carrier lifetime control of the buffer layers called "recombination enhancing layer" that are located between epilayers and substrates. [31][32][33][34][35]41,42) Although this technique can effectively reduce minority carrier concentration to be injected to the substrates, inserting additional epitaxial layers increase the wafer production costs.…”

Limited current conduction due to various types of stacking faults in n-type 4H-SiC epilayers

“…14,15) In particular, single Shockley-type stacking faults (1SSFs) in the epilayer are attracting attention because the 1SSFs expand from basal plane dislocations during forward current conduction in the bipolar devices, significantly degrading device performances and reliability, which is socalled bipolar degradation. [16][17][18][19] The mechanism of the decline in current conduction due to SFs are qualitatively explained based on a quantum well (QW) model. [20][21][22][23] The SF forms a QW in the conduction band where the electrons are trapped and accumulated, and consequently the trapped electrons induce a potential barrier in the conduction band, which disturbs the electron current flow.…”

Suppressed expansion of single Shockley stacking faults at narrow widths in 4H-SiC

“…11,12) In fact, bipolar degradation in 4H-SiC PiN diodes is greatly suppressed by insertion of a recombination-enhanced n + buffer layer between the substrate and the upper n − drift layer. 12,13) Nevertheless, the threshold current density necessary for 1SSF expansion from buffer/substrate interfaces is, for unknown reason, nearly one order of magnitude larger than that in the drift layer. 14) This is a basic problem from the scientific viewpoint, and to elucidate its cause is of technological importance for reliability of the devices in such a structure.…”