Very low cost graded SiGe base bipolar transistors for a high performance modular BiCMOS process

King, C. A.; Frei, M.; Mastrapasqua, M.; Ng, K. K.; Kim, Y.O.; Johnson, Richard W.; Moinian, S.; Martin, Samuel P.; Cong, H.-I.; Klemens, F.; Hsu, Terng-Ren; Campbell, T.; Molloy, Stephen; Fritzinger, L.B.; Ivanov, Ts.; Bourdelle, K.K.; Lee, C.; Chyan, Yih–Feng; Carroll, Michael S.; Leung, Chi-Wai

doi:10.1109/iedm.1999.824217

Cited by 28 publications

(11 citation statements)

References 4 publications

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“…As with the bipolar device, it is essential that these components integrate into the core CMOS process with a minimum of cost adders or extension of the time to process introduction [1], [2].…”

Section: Bicmos Process Technology For Mixed-rf Digital and Analog mentioning

confidence: 99%

BiCMOS technology for mixed-digital, analog, and RF applications

Rich

Carroll²,

Frei³

et al. 2002

IEEE Microwave

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Section: Bicmos Process Technology For Mixed-rf Digital and Analog mentioning

confidence: 99%

BiCMOS technology for mixed-digital, analog, and RF applications

Rich

Carroll²,

Frei³

et al. 2002

IEEE Microwave

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“…Thus the process becomes non-self-aligned. However, using a rather complicated process flow, including conversion of poly-Si to oxide, self-aligned transistors with a non-selective epitaxially grown base have been obtained [4]. A more straightforward way of achieving a self-aligned process is to introduce the epitaxy in the form of selective growth in the emitter window [5].…”

Section: Introductionmentioning

confidence: 99%

A Self-Aligned Double Poly-Si Process Utilizing Non-Selective Epitaxy of SiGe:C for Intrinsic Base and Poly-SiGe for Extrinsic Base

Pejnefors

Johansson²,

Wittborn³

et al. 2002

32nd European Solid-State Device Research Conference

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A self-aligned double poly-Si process using nonselective epitaxy of SiGe:C for the intrinsic base and a dual stack of poly-Si and poly-SiGe for the extrinsic base is presented. Self-alignment of the extrinsic base is obtained by detailed control of the emitter window etch procedure. The etch of the extrinsic base is endpointed at the poly-Si/poly-SiGe interface, and is followed by a timed etch of the SiGe film. Due to the selectivity towards Si, the etch can be stopped at the epitaxial Si surface.The SiGe:C epitaxy is obtained using ultra-high vacuum chemical vapor deposition (UHV/CVD). As a result of the slightly higher growth rate of the epitaxial film compared to the polycrystalline material, an almost planar surface could be obtained.Working devices have been verified by electrical measurements.

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“…BiCMOS is now the popular choice of technology for wireless communications and high-speed networks [1][2][3][4]. The key BiCMOS advantages of low noise, high speed NPNs, plus, low power, dense logic are particularly attractive for mobile RF products.…”

Section: Introductionmentioning

confidence: 99%

EP120: A 0.35um, 3V/5V, Mixed-Signal/RF BiCMOS Technology

Doyle

Moloney²,

O'Sullivan³

et al. 2000

30th European Solid-State Device Research Conference

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Abstr actThis paper describes a 0.35um BiCMOS process, the key aspect of which is the range of applications served by the process. To service the varied requirements, the process is designed to support high yielding, high performance active devices, high precision, well-matched passive elements, plus a variety of options such as thick metal, high-Q inductors. The process is also compatible with an existing dualvoltage CMOS process.The paper describes some novel features such as the NPN collector design, process thermal sequence and presents results from all the devices and a PLL circuit.

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Very low cost graded SiGe base bipolar transistors for a high performance modular BiCMOS process

Cited by 28 publications

References 4 publications

BiCMOS technology for mixed-digital, analog, and RF applications

BiCMOS technology for mixed-digital, analog, and RF applications

A Self-Aligned Double Poly-Si Process Utilizing Non-Selective Epitaxy of SiGe:C for Intrinsic Base and Poly-SiGe for Extrinsic Base

EP120: A 0.35um, 3V/5V, Mixed-Signal/RF BiCMOS Technology

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