Vertical GaN merged PiN Schottky diode with a breakdown voltage of 2 kV

Hayashida, Tomohiro; Nanjo, Takuma; Furukawa, Akihiko; Yamamuka, Mikio

doi:10.7567/apex.10.061003

Cited by 55 publications

(40 citation statements)

References 22 publications

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“…The integrated SBD in this work was benchmarked against state-of-the-art vertical SBDs on silicon, sapphire and GaN substrates in Fig. 5, revealing state-of-the-art performance compared to vertical GaN-on-Si SBDs [17], [18], [27][28][29][30][31][32][33][34][35][36][37][38]. The V BR of the integrated MOSFET-SBD can be significantly improved: 1.…”

Section: Resultsmentioning

confidence: 86%

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Vertical GaN-on-Si MOSFETs With Monolithically Integrated Freewheeling Schottky Barrier Diodes

Liu

Khadar

Matioli

2018

IEEE Electron Device Lett.

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1 Abstract-We demonstrate for the first time the monolithic integration of vertical GaN MOSFETs with freewheeling Schottky barrier diodes (SBD), based on a 6.7-μm-thick n-p-n heterostructure grown on 6-inch silicon substrates by metal organic chemical vapor deposition. The anode of the SBD is integrated in the source pad of the MOSFET and the cathode is directly connected to the MOSFET drain through the bottom n + -GaN layer, eliminating the need of any metal wire interconnection. This monolithic integration scheme offers reduced footprint, minimized parasitic components and simplified packaging. The integrated MOSFET-SBD showed enhancement-mode operation with a threshold voltage of 3.9 V, an on/off ratio of over 10 8 and a dramatic improvement in reverse conduction, without degradation in on-state performance from the integration of the SBD. The integrated GaN-on-Si vertical SBD exhibited excellent performance, with a specific on-resistance of 1.6 mΩ·cm 2 , a turn-on voltage of 0.76 V, an ideality factor of 1.5, along with a breakdown voltage of 254 V. These results reveal the promising potential of emerging GaN vertical devices for future power converters.

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Section: Resultsmentioning

confidence: 86%

“…By employing field plate, edge termination, and guard ring technologies [32][33][34]; 4. By utilizing trench or junction SBD architecture [35][36][37][38][39]. This excellent performance shows the great potential of GaN vertical devices for future power converters.…”

Section: Resultsmentioning

confidence: 94%

Vertical GaN-on-Si MOSFETs With Monolithically Integrated Freewheeling Schottky Barrier Diodes

Liu

Khadar

Matioli

2018

IEEE Electron Device Lett.

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“…The MPS concept was implemented and investigated for SiC-based devices [32][33][34][35][36][37][38]; however, there have been only a few reports about GaN-based MPS [39][40][41]. The early MPS work used a Si+ ion implantation technique to form n-type regions inside p-epi layers on free-standing GaN substrates, and the MPS appeared to be a smooth surface [40].…”

Section: Introductionmentioning

confidence: 99%

“…The early MPS work used a Si+ ion implantation technique to form n-type regions inside p-epi layers on free-standing GaN substrates, and the MPS appeared to be a smooth surface [40]. Recently, the GaN MPS diodes with bumpy surfaces were reported with p-type regions formed by Mg implantation or dry etching, showing forward conduction characteristics, and good blocking performance [41]. It should be noted that junction barrier Schottky diodes (JBSDs), which share a similar structure with MPS but have a different forward characteristic, are out of the scope of this study.…”

Section: Introductionmentioning

confidence: 99%

Device Design Assessment of GaN Merged P-i-N Schottky Diodes

2019

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Device characteristics of GaN merged P-i-N Schottky (MPS) diodes were evaluated and studied via two-dimensional technology computer-aided design (TCAD) after calibrating model parameters and critical electrical fields with experimental proven results. The device’s physical dimensions and drift layer concentration were varied to study their influence on the device’s performance. Extending the inter-p-GaN region distance or the Schottky contact portion could enhance the forward conduction capability; however, this leads to compromised electrical field screening effects from neighboring PN junctions, as well as reduced breakdown voltage. By reducing the drift layer background concentration, a higher breakdown voltage was expected for MPSs, as a larger portion of the drift layer itself could be depleted for sustaining vertical reverse voltage. However, lowering the drift layer concentration would also result in a reduction in forward conduction capability. The method and results of this study provide a guideline for designing MPS diodes with target blocking voltage and forward conduction at a low bias.

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“…First, the breakdown voltage can be increased if the electric field in the drift layer can be homogenized, e.g., by using field plates, [5,6] field rings, [7] and merged junctions that are also reversely biased when the device is in the blocking mode. [8] Second, the enhanced breakdown voltage is possible by passivating the surface imperfections. [9,10] Third, the breakdown voltage is significantly influenced by the drift layer with a very low doping concentration, in which the electric field is located when the device is working in the reverse blocking mode.…”

Section: Introductionmentioning

confidence: 99%

Polarization Engineering to Manipulate the Breakdown Voltage for GaN‐Based PIN Diodes

Hou

Chen

Jia

et al. 2019

Physica Status Solidi (a)

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This study proposes to increase the breakdown voltage for GaN‐based PIN diodes using the polarization effect, such that a thin AlGaN layer is inserted into the drift layer to modulate the electric field profiles, and by properly designing the device architecture, the electric field in the drift layer can be remarkably reduced by the polarization effect, and this enables the enhancement of the breakdown voltage. The study further investigates the parametric sensitivity of the breakdown voltage for the proposed GaN‐based PIN diodes to different device structures with various drift layer thicknesses. Moreover, it is found that the position of the inserted AlGaN thin layer is also important in affecting the breakdown voltage, such that the AlGaN insertion layer reduces the electric field with the maximum intensity in the drift layer.

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Vertical GaN merged PiN Schottky diode with a breakdown voltage of 2 kV

Cited by 55 publications

References 22 publications

Vertical GaN-on-Si MOSFETs With Monolithically Integrated Freewheeling Schottky Barrier Diodes

Vertical GaN-on-Si MOSFETs With Monolithically Integrated Freewheeling Schottky Barrier Diodes

Device Design Assessment of GaN Merged P-i-N Schottky Diodes

Polarization Engineering to Manipulate the Breakdown Voltage for GaN‐Based PIN Diodes

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