Vertical current components in integrated injection logic

Elsaid, M.H.; Roulston, D.J.; Watt, L.A.K.

doi:10.1109/t-ed.1977.18796

Cited by 17 publications

(3 citation statements)

References 7 publications

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“…6(a) b~cause it determines the recombination not only in the buried layer but also in the vertical base section (see Eqs. [10][11][12]. Note that the agreement of the calculations with the two dimensional model is enchanced when the fringe currents are taken into account.…”

Section: Resultsmentioning

confidence: 87%

“…Amp (23) Equation 23 has been obtained empirically [22] and is vaild for sheet resistivities R. in the range 10 2 to 10 4 ohm/D. Approximating the total electron current density by the component lnv flowing under the metal contact in the emitter is justified as it has been found to be the dominant component [11,12,19].…”

Section: The Common Base Current Gain Is Given By A= Ucfie)mentioning

confidence: 99%

“…Besides, the influence of the effective nn++ interface recombination velocity S,,+on the common base and common emitter current gains has also been investigated. The latter study assumes importance in Paper [2,9,10,II,12,13,14,15].…”

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confidence: 99%

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Analysis of DC Current Gains in Lateral Transistors

Ram¹,

Tyagi

Srivatsa

1987

IETE Journal of Research

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The dependence of the de current gains of lateral transistors on the buried layer doping level and on the effective nn+ recombination velocity S 1111 +has been analysed using a quasi-one dimensional model. The model takes into account the electric field in the retarding and the accelerating portions of the n+ subdift'used layer. Besides, It utilises the concept of an effective interface recombination velocity or transport velocity in analysing the hole transport in the vertical parasitic p-n-n +-p section. This adds to the simplicity of the present model.The common emitter and common base de current gains have been estimated for typical lateral transistor structures. The extension of the use of 'effective' lateral emitter and collector areas, previously defined for a device with an ideal nn+ interface (i.e., s,.+ =0" to transistors having non-zero S,,+has been demonstrated. Results from the present model have been compared with those from previously published two dimensional analyses. The comparison shows that the present 'ode! can give reasonable estimates of a and {1 for practical buried layer doping levels and for values of s.,+as high as 10 4 em/sec. The latter result is of significance because of the wide range (10-10 4 em/sec) of s,,+reported in literature.

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Section: Resultsmentioning

confidence: 87%