In this paper a comprehensive carrier dynamical transport model for semiconductor device simulation is presented. The model consists of carrier, carrier momentum and carrier energy conservation relations derived using a perturbation solution for the carrier distribution function. Carrier degeneracy, multiple conduction sub-bands and ellipsoidal constant energy surfaces are accounted for, and the effective masses and band edges are assumed to be spatially inhomogeneous. The new formulation overcomes modelling inaccuracies of previous energy transport models based on a drifted Maxwellian distribution function, and for spatially homogeneous, non-degenerate semiconductors offers several computational advantages.

In this paper two and three-dimensional Si MOSFET simulations based on a new carrier dynamical model of transport in semiconductors are presented. The simulation results derive from numerical solution of Poisson's equation, the carrier continuity equation and carrier momentum and energy conservation equations. Themodelling equations differ from those used previously in that they assume the carrier distribution is quantified by a perturbation approximation rather being a drifted Maxwellian. Momentum and energy relaxation times are taken as being dependent upon the average carrier energy, which is strictly proportional to temperature in the new transport model. This overcomes the problem, inherent in drift-diffusion-based device simulation, of mobility being modelled as a local electric field-dependent parameter. It is shown that no boundary conditions are needed for t h e carrier energy conservation equation and that a lattice energy conservation can be easily appended to the carrier dynamical transport model, allowing lattice temperature to be readily calculated. Carrier temperature profiles within MOS-FETS are presented, as are lattice temperature profiles for the two-dimensional simulations. It is demonstrated that carrier heating effects can be significant, indicating that carrier diffusion, which is directly proportional to the carrier temperature, may be underestimated by conventional (isothermal carriers and lattice) modelling and simulation techniques. The three-dimensional simulations show that the hottest carriers are not generated in the middle of the channel with respect to the width of a MOSFET.simulation. Note that impact ionisation can be import-Boulevard, Allcntown PA I8103 USA.ant, especially for substrate current determination.

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The damage, due to reactive ion etching in CF, + 0, plasma, has been investigated by /-V and C-V techniques using silicon devices such as Au/n-Si Schottky contacts, p+-n diodes and MOS structures. The forward characteristics of a Schottky diode and an exposed junction diode are significantly degraded due to RIE. The amount of damage increases with increasing RF voltage. Considerable recovery occurred when various post RIE treatments were used for the lower RF voltage RIE etching. Almost no recovery upon annealing is found for the higher voltage etching, which suggests the formation of more complex, defect sites at the higher etching voltages. MOS capacitors as well as MOSFETS were used to investigate the damage effects of RIE in Si-SiO, systems.

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