Using heavy-ion radiation to validate fault-handling mechanisms

Karlsson, Johan; Lidén, Peter; Dahlgren, Peter; Johansson, Rolf; Gunneflo, U.

doi:10.1109/40.259894

Cited by 142 publications

(41 citation statements)

References 12 publications

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“…There are efforts to model fault propagation and effect [5,7,12,17,19,22,23,27,28,30,32,36,38,39,40,41,44,45,47,50,52]. Coverage is a popular topic, and the meaning of coverage can vary from simple detection to complete system recovery and reconfiguration [1,2,3,4,5,10,11,12,15,16,17,18,20,21,27,29,31,33,36,37,38,39,40,41,42,43,44,54,55]. There are papers about the efficient estimation of coverage [15,…”

Section: Literature Surveymentioning

confidence: 99%

Designing fault-injection experiments for the reliability of embedded systems

White

2012

2012 IEEE/AIAA 31st Digital Avionics Systems Conference (DASC)

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This paper considers the long-standing problem of conducting fault-injections experiments to establish the ultra-reliability of embedded systems. There have been extensive efforts in fault injection, and this paper offers a partial summary of the efforts, but these previous efforts have focused on realism and efficiency. Fault injections have been used to examine diagnostics and to test algorithms, but the literature does not contain any framework that says how to conduct fault-injection experiments to establish ultra-reliability. A solution to this problem integrates field-data, arguments-from-design, and fault-injection into a seamless whole. The solution in this paper is to derive a model reduction theorem for a class of semi-Markov models suitable for describing ultra-reliable embedded systems. The derivation shows that a tight upper bound on the probability of system failure can be obtained using only the means of system-recovery times, thus reducing the experimental effort to estimating a reasonable number of easily-observed parameters. The paper includes an example of a system subject to both permanent and transient faults. There is a discussion of integrating fault-injection with fielddata and arguments-from-design.

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Section: Literature Surveymentioning

confidence: 99%

Designing fault-injection experiments for the reliability of embedded systems

White

2012

2012 IEEE/AIAA 31st Digital Avionics Systems Conference (DASC)

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“…This approach is common when simulating physical faults (radiation, EMI etc.) which are inherently "random" in nature [Karlsson et al, 1994].…”

Section: Time-triggermentioning

confidence: 99%

Robustness Evaluation of Operating Systems

Johansson

2008

Information Assurance

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SummaryThe premise behind this thesis is the observation that Operating Systems (OS), being the foundation behind operations of computing systems, are complex entities and also subject to failures. Consequently, when they do fail, the impact is the loss of system service and the applications running thereon. While a multitude of sources for OS failures exist, device drivers are often identified as a prominent cause behind failures.In order to characterize the impact of driver failures, at both the OS and application levels, this thesis develops a framework for error propagation-based robustness profiling for an OS. The framework is first developed conceptually and then experimentally validated on a real OS, namely Windows CE .Net. The choice of Windows CE is driven by its representativeness for a multitude of OS's, as well as the ability to customize the OS components for particular needs.For experimental validation, fault injection is a prominent technique that can be used to simulate faults (or errors) in the system by inserting synthetic ones and study their effect. Three key questions with such a technique are where, what and when to inject faults. This thesis shows how injecting errors at the interface between drivers and the OS can be very effective in evaluating the effects driver faults can have.To quantify the OS's robustness, this thesis defines a series of error propagation measures, specifically tailored for device drivers. These measures allow for quantifying and comparing both individual services and device drivers on their susceptibility and diffusing abilities.This thesis compares three contemporary error models on their suitability for robustness evaluation. The classical bit-flip model is found to identify a higher number of severe failures in the system. It also identifies failures for more services than both other models, data type and fuzzing. However, its main drawback is that it requires substantially more injections than the other two. Fuzzing, even though not giving rise to as many failures is able to find new additional services with severe failures.A careful study of the injections performed with the bit-flip model shows that only a few bits are generally useful for identifying new services with robustness weaknesses. Consequently, a new composite model is proposed, combining the most effective bits of the bit-flip model with the fuzzing model's ability to identify new services, giving rise to new model without loss of important information and at the same time incurring a moderate number of injections.To answer the question of when to inject an error this thesis proposes a novel model of a driver's usage profile, focusing on high-level operations being carried out. It guides the injection of errors to instances when the driver is carrying out specific operations. Results from extensive fault injection experiments show that more service vulnerabilities can be discovered. Furthermore, a priori profiling of the drivers can show how effective the proposed approach will be. vi

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“…Although SEUs are major concern, multiple-bit upset (MBU) has become important problem in the design processes of the memories. The probabilities of multiple errors due to technology shrinkage have been already discussed in [4] and [5]. As the size of the memories increases the probability of having multiple bits upset increase since large number of memory cells has been discussed in [6] and [7].…”

Section: Introductionmentioning

confidence: 99%

“…Unfortunately packing and shielding cannot be effective against SEUs and MBUs since the neutrons can easily penetrate through the shield packages [5], [8].…”

Section: Introductionmentioning

confidence: 99%

Multi-Bit Upset Deduction/Correction for Memory Applications

JushwanthXavier¹,

Kantham²

2013

IJAIS

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In electronics memories are the widely used elements. As the transistor size shrinks multiple-bit upset (MCUs) are increasing due to radiation effects in memories. This affects the reliability of memories. Interleaving and built-in current sensors (BICS) have been success in the case of single event upset (SEC). The process is taken one step further by proposing specific error correction codes to protect memories against multiple-bit upsets and to improve yield have been proposed. The method is evaluated using fault injection experiments. The results are compared with known techniques such as Hamming codes. The proposed codes provide a better performance compared to that of the hamming codes in terms of Single Event Upset. In the case of the Multi Bit Upset it provides better coverage in error deduction and correction schemes.

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Using heavy-ion radiation to validate fault-handling mechanisms

Cited by 142 publications

References 12 publications

Designing fault-injection experiments for the reliability of embedded systems

Designing fault-injection experiments for the reliability of embedded systems

Robustness Evaluation of Operating Systems

Multi-Bit Upset Deduction/Correction for Memory Applications

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