2008
DOI: 10.1109/ted.2008.922492
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Universal Potential Model in Tied and Separated Double-Gate MOSFETs With Consideration of Symmetric and Asymmetric Structure

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Cited by 55 publications
(40 citation statements)
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“…For low values of drain voltage V ds , following the study in [9][10][11][12], and applying the boundary conditions ((2a), (2b), (2c) and ∂ψ/∂r = 0, the symmetry condition of the structure, for r = 0), when the ratio of channel length (L) silicon thickness (t si ) is >2 and t si > 5 nm, the potential distribution, ψ(r, z), in the thin silicon film can be represented as a second-order parabolic function along the radial (r) direction:…”
Section: Theory Derivation and Model Developmentmentioning
confidence: 99%
See 1 more Smart Citation
“…For low values of drain voltage V ds , following the study in [9][10][11][12], and applying the boundary conditions ((2a), (2b), (2c) and ∂ψ/∂r = 0, the symmetry condition of the structure, for r = 0), when the ratio of channel length (L) silicon thickness (t si ) is >2 and t si > 5 nm, the potential distribution, ψ(r, z), in the thin silicon film can be represented as a second-order parabolic function along the radial (r) direction:…”
Section: Theory Derivation and Model Developmentmentioning
confidence: 99%
“…Replacing (11) in (6), the final subthreshold swing is obtained as S = V t ln(10) 1 + α sch (14) with…”
Section: Subthreshold Swing Modelmentioning
confidence: 99%
“…There are two main types of DG TFETs: (1) a symmetric type TFET with identical gate work functions, gate oxide material and gate oxide thickness so that the two surface channels turn on at the same applied gate voltage, here surface channel, means the channel near the Si-SiO 2 interface and (2) an asymmetric type TFET, where there is difference in front gate oxide and back gate oxide in terms of either one or both material or thickness, as a result the tunneling takes place at different applied gate voltages. Further both the above configurations can be applied to three-terminal (3T-when front gate and back gate are tied together) and four-terminal (4T-when front gate and back gate work as two independent terminals) TFET [10,11]. In fourterminal device since the back gate can be adjusted independently, hence the user has the flexibility to set the threshold voltage of the device according to requirement, hence 4T plays significant role in digital circuit design.…”
Section: Introductionmentioning
confidence: 99%
“…Two particular devices that have seen a lot of attention lately are the Symmetric DG-MOSFET [1][2][3][4][5][6] and the thin-film MOSFET on a thick insulating substrate [7][8][9][10]. The former is one of several technologies promising to extend Moore's Law [11], and the latter is of interest to the flat-panel display community.…”
Section: Introductionmentioning
confidence: 99%
“…The former is one of several technologies promising to extend Moore's Law [11], and the latter is of interest to the flat-panel display community. Both of these devices can be modeled by applying boundary conditions (2) and (3) to (1).…”
Section: Introductionmentioning
confidence: 99%