Harnessing the potential of single crystal inorganic nanowires for practical advanced nanoscale applications requires not only reproducible synthesis of highly regular one-dimensional (1D) nanowire arrays directly on device platforms but also elegant device integration which retains structural integrity of the nanowires while significantly reducing or eliminating complex critical processing steps. Here we demonstrate a unique, direct, and bottom-up integration of a semiconductor 1D nanowire, using zinc oxide (ZnO) as an example, to obtain a vertical surround-gate field-effect transistor (VSG-FET). The vertical device structure and bottom-up integration reduce process complexity, compared to conventional top-down approaches. More significantly, scaling of the vertical channel length is lithographically independent and decoupled from the device packing density. A bottom electrical contact to the nanowire is uniquely provided by a heavily doped underlying lattice-match substrate. Based on the nanowire-integrated platform, both n-and p-channel VSG-FETs are fabricated. The vertical device architecture has the potential for use in tera-level ultrahigh-density nanoscale memory and logic devices.As device dimensions continue to shrink into the nanometer length scale regime, fundamental physical limits and economics are likely to hinder further scaling according to Moore's law.1 New strategies including usage of new materials, innovative device architectures, and smart integration schemes are needed to extend the current capabilities beyond the end of the technology roadmap time frame. 2 "Bottom-up" approaches to nanoelectronics that utilize functional electronic nanostructures, 3-5 in particular 1D semiconductor nanowires, have the potential to stretch beyond the limits of traditional top-down manufacturing. However, the usual pick-and-place approaches of manipulating and aligning horizontally lying nanowires to fabricate prototype devices and the stringent lithography requirements have to be overcome before practical realization of integrated nanosystems. Furthermore, lithographic issues become paramount in further scaling of these nanowire-based planar devices, especially in defining ultra-small channel length in field-effect transistors (FETs).A proposed solution to these problems is to grow single crystal 1D nanowires directly on a device substrate with the major nanowire growth axis orthogonal to the substrate plane and to use this nanowire-integrated platform for direct device fabrication. Based upon this vertical generic configuration, an ensemble of nanoscale devices can be realized 6,7 ( Figure S1, Supporting Information). In the present work, we demonstrate the potential of this approach through the realization of a vertical surround-gate field-effect transistor (VSG-FET), which takes advantage of the vertical dimension unlike planar nanowire-based FETs and traditional metaloxide-semiconductor (MOS) FETs. The advantages of this vertical device configuration and enhanced device performance have been ad...

A humidity sensor on cellulose paper is demonstrated using single-walled carbon nanotubes functionalized with carboxylic acid. The conductance shift of the nanotube network entangled on the microfibril cellulose is utilized for the humidity sensing. Compared to the control sensor made on a glass substrate, the cellulose-mediated charge transport on the paper substrate enhances the sensitivity. The sensor response exhibits linear behavior up to a relative humidity of 75% with good repeatability and low hysteresis. A simple circuit model is used to explain the sensor results. This approach is a step toward future paper electronics for low-cost disposable applications.

Growth of large-size-two-dimensional crystalline pentacene grains for high performance organic thin film transistors AIP Advances 2, 022138 (2012) Effects of substrate strain and electrical stress on lattice dynamics, defects, and traps in strainedSi/Si0.81Ge0.19n-type metal-oxide-semiconductor field effect transistors J. Appl. Phys. 111, 104507 (2012) Threshold voltage shift and drain current degradation by negative bias temperature instability in Si (110) pchannel metal-oxide-semiconductor field-effect transistor Appl. Phys. Lett. 100, 212109 (2012) High-speed metal-insulator transition in vanadium dioxide films induced by an electrical pulsed voltage over nano-gap electrodes Appl. Phys. Lett. 100, 213507 (2012) Kubo-Greenwood approach for the calculation of mobility in gate-all-around nanowire metal-oxide-semiconductor field-effect transistors including screened remote Coulomb scattering-Comparison with experiment

The biomimetic characteristics of the memristor as an electronic synapse and neuron have inspired the advent of new information technology in the neuromorphic computing. The application of the memristors can be extended to the artificial nerves on condition of the presence of electronic receptors which can transfer the external stimuli to the internal nerve system. In this work, nociceptor behaviors are demonstrated from the Pt/HfO /TiN memristor for the electronic receptors. The device shows four specific nociceptive behaviors; threshold, relaxation, allodynia, and hyperalgesia, according to the strength, duration, and repetition rate of the external stimuli. Such nociceptive behaviors are attributed to the electron trapping/detrapping to/from the traps in the HfO layer, where the depth of trap energy level is ≈0.7 eV. Also, the built-in potential by the work function mismatch between the Pt and TiN electrodes induces time-dependent relaxation of trapped electrons, providing the appropriate relaxation behavior. The relaxation time can take from several milliseconds to tens of seconds, which corresponds to the time span of the decay of biosignal. The material-wise evaluation of the electronic nociceptor in comparison with other material, which did not show the desired functionality, Pt/Ti/HfO /TiN, reveals the importance of careful material design and fabrication.

A flexible, compressible, hydrophobic, ice-repelling, floatable, and conductive carbon nanotube (CNT)-polydimethylsiloxane (PDMS) sponge is presented. The microporous sponge-like PDMS scaffold fabricated with a sugar cube template is capable of CNT uptake. The CNT-PDMS sponge (CPS) is deformable and compressible up to 90%. The Young's modulus varies from 22 KPa to 200 KPa depending on the applied strain. The conductive pathways via the CNT network increase with compressive strain similar to a variable resistor or pressure sensor. The softness of the CPS can be utilized for artificial skin to grip sensitive objects. In addition, the contact angle of water droplets on CPS shows 141°, and thus the hydrophobic nature of the CPS can be exploited as a floating electrode. Furthermore, the hydrophobicity is maintained below freezing temperature, allowing an ice-repelling electrode.

A silicon nanowire field effect transistor (FET) straddled by the double-gate was demonstrated for biosensor application. The separated double-gates, G1 (primary) and G2 (secondary), allow independent voltage control to modulate channel potential. Therefore, the detection sensitivity was enhanced by the use of G2. By applying weakly positive bias to G2, the sensing window was significantly broadened compared to the case of employing G1 only, which is nominally used in conventional nanowire FET-based biosensors. The charge effect arising from biomolecules was also analyzed. Double-gate nanowire FET can pave the way for an electrically working biosensor without a labeling process.

Vacuum tubes that sparked the electronics era had given way to semiconductor transistors. Despite their faster operation and better immunity to noise and radiation compared to the transistors, the vacuum device technology became extinct due to the high power consumption, integration difficulties, and short lifetime of the vacuum tubes. We combine the best of vacuum tubes and modern silicon nanofabrication technology here. The surround gate nanoscale vacuum channel transistor consists of sharp source and drain electrodes separated by sub-50 nm vacuum channel with a source to gate distance of 10 nm. This transistor performs at a low voltage (<5 V) and provides a high drive current (>3 microamperes). The nanoscale vacuum channel transistor can be a possible alternative to semiconductor transistors beyond Moore's law.

A single-wall carbon nanotube (CNT) based ammonia sensor was implemented on cellulose paper. Two types of devices were fabricated and compared: CNT-on-paper and a CNT-cellulose composite. The resistance shift of the CNT network upon ammonia exposure was monitored in the chemiresistor approach. The CNT-on-paper showed faster response/recovery and higher sensitivity than the CNTcellulose composite due to the larger reaction surface. Compared to the control sensor made on a glass substrate, the paper based sensor characteristics exhibited superior uniformity and repeatability. The present approach can be utilized for smart paper featuring low-cost disposable applications.