Ultrashort Channel Silicon Nanowire Transistors with Nickel Silicide Source/Drain Contacts

Abstract

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Functionality-Enhanced Logic Gate Design Enabled by Symmetrical Reconfigurable Silicon Nanowire Transistors

“…However, aggressively scaled gate-all around silicon nanowire FETs with diameters below 5 nm and Schottky barrier FETs with channels length down to 10 nm have already be shown in literature [11], [12]. Thus, we derived a scaled TCAD model, resembling the basic functional features of our RFET device to study its switching behavior on a more relevant feature size showing a distinctly reduced τ .…”

Atomic size effects studied by transport in single silicide nanowires

“…The large and still growing interest in silicides, i.e., binary compounds of Si with electropositive elements like transition metals (TM) or rare earth (RE) elements, is driven by their unique properties for applications as well as for addressing fundamental questions [1][2][3][4][5][6]. For instance, novel ultralow resistivity (i.e., ρ 10 μ cm) TM-based silicides are intended to be used as interconnects or gate electrodes for the next generation CMOS technology [7][8][9][10][11].…”

Silicon Nanowires: Fabrication and Applications

“…In the SBFET, the highly doped source and drain regions are replaced by metal-semiconductor Schottky junctions, and the silicon body of the transistor can be undoped. The device benefits from the nanowire geometry since very sharp and defined silicide junctions can be used [79]. For charge transport this implies that two energy barriers are introduced along the current path.…”