Ultra-thin silicon oxide layers on crystalline silicon wafers: Comparison of advanced oxidation techniques with respect to chemically abrupt SiO 2 /Si interfaces with low defect densities

Stegemann, Bert; Gad, Karim M.; Balamou, Patrice; Sixtensson, Daniel; Vossing, Daniel; Käsemann, Martin

doi:10.1016/j.apsusc.2016.06.090

Cited by 43 publications

(35 citation statements)

References 57 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…They built on early work of the nitric acid oxidation of silicon (NAOS) technique by Asuha and Mihailetchi , to achieve SRVs as low as 20–70 cm s −1 by constant and alternating voltage anodic oxidation, followed by annealing at 400 °C in oxygen and then forming gas . Similar reports by Gad et al and Stegemann et al show that a wide range of low temperature chemical oxides present high interface density ∼10 12 eV −1 cm −2 . This leads to relatively poor surface passivation only improved using rapid thermal or forming gas anneals.…”

Section: Materials and Methods For Silicon Surface Passivationmentioning

confidence: 87%

Dielectric surface passivation for silicon solar cells: A review

Bonilla

Hoex

Hamer

et al. 2017

Physica Status Solidi (a)

224

161

View full text Add to dashboard Cite

This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.Silicon wafer solar cells continue to be the leading photovoltaic technology, and in many places are now providing a substantial portion of electricity generation. Further adoption of this technology will require processing that minimises losses in device performance. A fundamental mechanism for efficiency loss is the recombination of photo-generated charge carriers at the unavoidable cell surfaces. Dielectric coatings have been shown to largely prevent these losses through a combination of different passivation mechanisms. This review aims to provide an overview of the dielectric passivation coatings developed in the past two decades using a standardised methodology to characterise the metrics of surface recombination across all techniques and materials. The efficacy of a large set of materials and methods has been evaluated using such metrics and a discussion on the current state and prospects for further surface passivation improvements is provided.

show abstract

Section: Materials and Methods For Silicon Surface Passivationmentioning

confidence: 87%

Dielectric surface passivation for silicon solar cells: A review

Bonilla

Hoex

Hamer

et al. 2017

Physica Status Solidi (a)

224

161

View full text Add to dashboard Cite

show abstract

“…As shown in Figure a, we further implemented electrical current–voltage ( J–V ) testing on the Si/SiO x /Al architectures (inset of Figure a) to evaluate the carrier tunneling effects. As the thickness of the SiO x layer is increased, the contact resistivity between the Al electrode and Si substrate also increases because of the reduced tunneling opportunities in thicker SiO x passivation layers (Figure b) . Thus, compared with Figures and , the SiO x layer with a thickness of 1.5 nm is more suitable for solar cell application because it shows a balanced trade‐off between passivation and carrier tunneling transportation.…”

Section: Resultsmentioning

confidence: 99%

Realization of 16.9% Efficiency on Nanowires Heterojunction Solar Cells with Dopant‐Free Contact for Bifacial Polarities

Wang

Zhang

Yang

et al. 2018

Adv Funct Materials

View full text Add to dashboard Cite

Low-cost and efficient interfacial layer construction with the required charge selectivity and compatibility is necessary for nanostructured solar cells, and the proper integration of the interfacial layer with the light-trapping system is required to improve the power conversion efficiency of the cell. Herein, low-cost Si nanowires-based solar cells with tunneling heterojunctions are developed by the deposition of MoO x and spin-coating of Cs 2 CO 3 as the carrier-selective layers. The power conversion efficiency of 16.9% for a device of 4 cm 2 in area is achieved by Si nanowires solar cells by the self-assembly of ultra-thin SiO x as the surface tunneling passivation layer. Self-assembly is realized with an ultraviolet O 3 treatment process at room temperature. Quasi-steady-state photoconductance, microwave-detected photoconductance decay, and constant current-voltage measurements are used to characterize the passivation quality and tunneling transportation properties of the ultra-thin SiO x layers. Interfacial charge recombination is suppressed and effective carrier tunneling properties are developed by the growth of ≈1.5 nm thick SiO x layers on the surfaces of the Si nanowires. This proposed Si nanowires solar cell architecture featuring tunneling heterojunctions achieves high performance and may be suitable for fabricating industrialized Si nanowires-based photovoltaic devices through a cost-effective, simple, and low-temperature process.

show abstract

“…In the wet chemical oxidation process, samples need to be dipped in a diluted HCl solution (1%) or boiled in concentrated HNO 3 solution at 80 C for 20-30 min. 10,26,27 Effect of UV/ozone oxidation period on the wettability of Si(100) surface…”

Section: Resultsmentioning

confidence: 99%