1997
DOI: 10.1063/1.118182
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Ultra-low resistive ohmic contacts on n-GaN using Si implantation

Abstract: Implanted ohmic contacts were made on molecular beam epitaxy grown GaN materials. Si was implanted at a doping density of about 4×1020  cm-3 to decrease the contact resistance of the contact, followed by an activation anneal at 1150 °C for 30 s. The overlay metal Ti/Au was evaporated. Four-probe measurements were performed on transmission line model patterns. The measured maximum contact resistance was 0.097 Ω mm and the apparent specific contact resistance was 3.6×10−8 Ω cm2.

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Cited by 110 publications
(37 citation statements)
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“…For these prototype devices a large insertion loss of 10-20 dB is observed, owing mostly to the resistance of the ohmic contacts, which deviates from 50 Ω. Precise control of the contact resistance and capacitance using ion- implantation can overcome this limitation and also dramatically shrink the footprint of these devices 24,25 . The time-domain response of the switch is demonstrated by amplitude modulating an applied 120 MHz constant wave tone, as shown in Fig.…”
Section: A Hemt Switching Elementsmentioning
confidence: 99%
“…For these prototype devices a large insertion loss of 10-20 dB is observed, owing mostly to the resistance of the ohmic contacts, which deviates from 50 Ω. Precise control of the contact resistance and capacitance using ion- implantation can overcome this limitation and also dramatically shrink the footprint of these devices 24,25 . The time-domain response of the switch is demonstrated by amplitude modulating an applied 120 MHz constant wave tone, as shown in Fig.…”
Section: A Hemt Switching Elementsmentioning
confidence: 99%
“…For these reasons, post-implantation anneals used in the fabrication of GaN-based electronics have been performed at growth temperatures ͑ϳ1100°C͒ as in the GaN junction field-effect transistor reported by Zolper et al 3 and the ultralow contact resistance achieved by Burm et al on Si-implanted GaN ͑0.097 ⍀ mm͒. 4 Recently, we have observed threading dislocation motion, reaction, and resultant reduction by adopting a rapid annealing technique at 1500°C with 100 bar N 2 overpressure. A removable AlN capping layer was used to protect the GaN during the anneal, and smooth pit-free surfaces were observed after annealing.…”
mentioning
confidence: 99%
“…The first approach was to use Si implantation into the HFETs to increase the electron concentration to facilitate carrier tunneling across the contact [4][5][6][7][8] . We picked sample #4 (the worst case) in Table 2 as a test vehicle to examine the implantation approach; we assumed that if the contact behavior on sample #4 could be improved, then all other samples could be improved using the same approach.…”
Section: Approaches To Fabricate Low Resistance-contact In a Morementioning
confidence: 99%