Cryogenic Control Architecture for Large-Scale Quantum Computing

Abstract

Solid-state qubits have recently advanced to the level that enables them, in principle, to be scaledup into fault-tolerant quantum computers. As these physical qubits continue to advance, meeting the challenge of realising a quantum machine will also require the engineering of new classical hardware and control architectures with complexity far beyond the systems used in today's fewqubit experiments. Here, we report a micro-architecture for controlling and reading out qubits during the execution of a quantum algorithm such as an error correcting code. We demonstrate the basic principles of this architecture in a configuration that distributes components of the control system across different temperature stages of a dilution refrigerator, as determined by the available cooling power. The combined setup includes a cryogenic field-programmable gate array (FPGA) controlling a switching matrix at 20 millikelvin which, in turn, manipulates a semiconductor qubit.Realising the classical control system of a quantum computer is a formidable scientific and engineering challenge in its own right 1,2 . The hardware that comprises the control interface must be fast relative to the timescales of qubit decoherence, low-noise so as not to further disturb the fragile operation of qubits, and scalable with respect to physical resources, ensuring that the footprint for routing signal lines or the operating power does not grow rapidly as the number of qubits increases 3,4 . As solid-state quantum processors will likely operate below 1 kelvin 5-8 , components of the control system will also need to function in a cryogenic environment, adding further constraints.Similar challenges have long been addressed in the satellite and space exploration community 9 , where the need for high-frequency electronic systems operating reliably in extreme environments has driven the development of new circuits and devices 10 . Quantum computing systems, on the other hand, have to date largely relied on brute-force approaches, controlling a few qubits directly via room temperature electronics that is hardwired to the quantum device at cryogenic temperatures.Here we present a control architecture for operating a cryogenic quantum processor autonomously and demonstrate its basic building blocks using a semiconductor qubit. This architecture addresses many aspects related to scalability of the control interface by embedding multiplexing sub-systems at cryogenic temperatures and separating the high-bandwidth analog control waveforms from the digital addressing needed to select qubits for manipulation. Our demonstration comprises a commercial field-programmable gate array (FPGA) operating at 4 kelvin and controlling a microwave signal switching matrix at 20 mK, which then interfaces with a quantum dot device. Bringing these sub-systems together in the context of our control architecture suggests a path for scaleup of control hardware needed to manipulate the large numbers of qubits in a useful quantum machine. I. CONTROL MICRO-ARCHITECTUREOur control micro-...

CMOS Based Scalable Cryogenic Control Electronics for Qubits

“…Taking into account the cooling power of dilution refrigerators around 100mK (the typical operating temperature of GaAs qubits) of approximately 1mW, the approach shown here should allow to operate on the order of hundred qubits, even with today's available commercial CMOS processes. With the use of dedicated cryogenic electronics using supply voltages on the order of 10mV instead of 1V, the power consumption could be reduced by another factor 10.000, (1V/10mV) 2 …”

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

“…The performance observed at cryogenic temperature of the control electronics suggests that three types of multiplexing can be used based on time-division multiple access (TDMA), frequency-division multiple access, and space-division multiple access to significantly reduce the number of interconnects and reduce power dissipation to the cooling power of the refrigerator. The creation of TDMA multiplexers capable of operating at mK temperatures is required, while TDMA demultiplexers and the reminder of the loops can already operate at 1.6-4.2 K. 105,107 The programming of the digital back-end and of the analog front-end can be done with high-speed serial lines, thus minimizing the number of interconnects connecting room temperature devices to cold circuits. In order to minimize the wiring requirements, a first layer of electronic control can be implemented as close as possible to the qubits in terms of temperature and/or physical distance, either on the same silicon substrate or via three-dimensional integration.…”

“…As a classical electronic interface operated at room temperature involves problems such as linearity of interconnections with the number of qubits, linearly scaled thermal flux to the quantum system, and power dissipated to control each qubit before being attenuated of several orders of Quantum information density scaling D Rotta et al magnitude (often 60-100 dB), cryogenic multiplexing in CMOS is being developed. [105][106][107] A generic implementation of a faulttolerant loop is shown in Fig. 3a.…”

Flexible ultrathin-body single-photon avalanche diode sensors and CMOS integration

“…The measurements are significant, since they prove for the first time that cryogenic SPADs in CMOS operation is possible. It could be very useful for the telecommunication electronics [14] for quantum computer [15] in the future.…”