Tunneling MOSFET technologies using III-V/Ge materials

Takagi, Shinichi; Ahn, Dae‐Hwan; Noguchi, M.; Gotow, Takahiro; Nishi, Koichi; Kim, M.; Takenaka, Mitsuru

doi:10.1109/iedm.2016.7838454

Cited by 23 publications

(39 citation statements)

References 2 publications

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“…RTA temperatures were at 600 and 650°C for P and 600°C for Sb. After removing the SOG film, the samples were patterned by CF 4 trodes for the source and drain (S=D) contacts and 100-nmthick Al films for the back contacts were deposited by the same method as the fabrication process of the n + -p diodes. All the electrical measurements were carried out with the source and back contacts shorted.…”

Section: Experimental Methodsmentioning

confidence: 99%

“…A tunneling FET (TFET) is expected as an alternative electron device to the MOSFET, because its subthreshold swing (SS) can be smaller than 60 mV=dec, which is the theoretical limit of the MOSFET at 300 K. [1][2][3][4] However, Si TFETs suffer from a low ON current owing to the wide and indirect bandgap of Si. 5,6) Therefore, narrower-bandgap materials have been intensively studied as TFET channel materials.…”

Section: Introductionmentioning

confidence: 99%

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Ge p-channel tunneling FETs with steep phosphorus profile source junctions

Takaguchi

Matsumura

Katoh

et al. 2018

Jpn. J. Appl. Phys.

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The solid-phase diffusion processes of three n-type dopants, i.e., phosphorus (P), arsenic (As), and antimony (Sb), from spin-on-glass (SOG) into Ge are compared. We show that P diffusion can realize both the highest impurity concentration (>7 ' 10 19 cm %3 ) and the steepest impurity profile (>10 nm/dec) among the cases of the three n-type dopants because the diffusion coefficient is strongly dependent on the dopant concentration. As a result, we can conclude that P is the most suitable dopant for the source formation of Ge p-channel TFETs. Using this P diffusion, we fabricate Ge p-channel TFETs with high-P-concentration and steep-P-profile source junctions and demonstrate their operation. A high ON current of >1.7 µA/µm is obtained at room temperature. However, the subthreshold swing and ON current/OFF current ratio are degraded by any generation-recombination-related current component. At 150 K, SS min of >108 mV/dec and ON/OFF ratio of >3.5 ' 10 5 are obtained.

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Section: Experimental Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Ge p-channel tunneling FETs with steep phosphorus profile source junctions

Takaguchi

Matsumura

Katoh

et al. 2018

Jpn. J. Appl. Phys.

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“…In order to achieve the low V D operation, a steeper subthreshold swing (S.S.) than the conventional CMOS is required. The tunnel field-effect transistor (TFET) is one of such promising devices that has a steeper S.S. less than 60 mV/decade of conventional transistors, by using high-energy filtering effects of the band-to-band tunneling (BTBT) mechanism [1,2,3,4,5,6,7,8,9,10,11,12].…”

Section: Introductionmentioning

confidence: 99%

SPICE simulation of 32-kHz crystal-oscillator operation based on Si tunnel FET

Tanamoto

Tanaka²,

Takagi

2020

IEICE Electron. Express

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The tunnel field-effect transistor (TFET) is one of the promising transistors which is expected to replace some complementary metal-oxide semiconductor (CMOS) circuits. Here, we apply a SPICE simulation of a Si TFET using high-K gate insulator to a simple circuit of 32-kHz crystal oscillator and compare the power consumption of Si TFET with conventional CMOSs calculated from the predictive transistor model (PTM). We considered L = 65-nm and L = 90-nm devices based on a table model whose values are derived from technology computer aided design (TCAD) calculations. We show that the power consumptions of TFETs are about 22.3%∼38.6% lower than those of CMOSs for L = 65-nm devices, and we show the 13.6%∼36.1% lower power consumption of TFETs for L = 90nm devices.

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“…Moreover, it is considered that the end of transistor scaling is inevitable in the near future. Given this background, the development of the tunnel field-effect transistor (TFET) has been attracting great interest [1][2][3][4][5][6][7][8]. TFET's steep subthreshold-slope (SS) current-voltage characteristics would enable low-power operation in many applications.…”

Section: Introductionmentioning

confidence: 99%