Tunneling Field-Effect Transistors for Ultra-Low-Power Application

Abstract

One of the major roadblocks to further scaling of complementary metaloxide semiconductor (CMOS) devices is power consumption. Reduction of power consumption requires low operation voltage, which requires low threshold voltage. In order to decrease the threshold voltage without excessive increase of OFF current, reduction of the subthreshold swing is essential. To reduce the subthreshold swing, various carrier injection mechanisms other than thermal carrier injection have been proposed. Currently, interband tunneling is the most promising mechanism and the device that utilizes such a mechanism is a tunneling field-effect transistor (TFET). After the introduction to the fundamentals of TFETs, various approaches to increase the drain current of Si TFETs by device structure engineering are described. The last section focuses on bandgap engineering to enhance the drain current of TFETs.

Reducing Ambipolar Conduction in a Graphene Tunneling Field Effect Transistor (GTFET) via Bandgap Engineering

“…The researchers presented different ways to improve the ON-state current such as use of high-k dielectric at the gate (the high-k dielectric improves the coupling of the gate to the source/body junction), inserting a thin counter-doping layer between the source and the channel (the layer can enhance the electric field by space-charge effect), increasing of injection area of carriers (a larger injection area can increase the tunneling current). 9 While the results have been successful in improving the ON-state current of the TFET, a few efforts have been dedicated to reduce the ambipolar current.…”