Transient Response Characterization of the High-Speed Interconnection RLCG-Model for the Signal Integrity Analysis

Eudes, Thomas; Ravelo, Blaise; Louis, Anne

doi:10.2528/pier10111805

Cited by 47 publications

(44 citation statements)

References 32 publications

(51 reference statements)

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“…This section verifies the signal integrity on the DDR3 bus via in the time [22] and frequency domains. The waveform was examined at the receiver end in the time domain.…”

Section: Simulation Resultsmentioning

confidence: 99%

Crosstalk and Discontinuities Reduction on Multi-Module Memory Bus by Particle Swarm Optimization

Lin¹,

Wu²,

Liu

et al. 2011

PIER

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Abstract-Due to high-density routing under the CPU and DIMM areas, the original design of even and odd mode characteristic impedances changes. The occurrence of multi-drop problem between the CPU and memory chip causes over-and under-driven that reduce the eye opening. Furthermore, the different phase velocities of evenand odd-modes cause timing jitter at the receiver end. This paper proposes two steps to solve the complex issue of signal integrity for the multi-module memory bus. First, particle swarm optimization (PSO) is used to tune the characteristic impedance of the transmission line and on-die termination (ODT) values to improve transmission line impedance changes to obtain maximum power delivery. The fitness function of the algorithm is defined by selecting the minimum reflection coefficient at the driver side and maximum the transmission coefficient at the receiver side to reduce the over-and under-driven Second, the timing jitter can be reduced by placing a capacitor to compensate for the velocity difference caused by different propagation modes. Finally, signal integrity enhancements for the DDR3 are verified by measuring S parameters in the frequency domain and postprocessed eye diagrams in the time domain.

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“…This section verifies the signal integrity on the DDR3 bus via in the time [22] and frequency domains. The waveform was examined at the receiver end in the time domain.…”

Section: Simulation Resultsmentioning

confidence: 99%

Crosstalk and Discontinuities Reduction on Multi-Module Memory Bus by Particle Swarm Optimization

Lin¹,

Wu²,

Liu

et al. 2011

PIER

View full text Add to dashboard Cite

show abstract

“…A literature review shows that radiated emissions from TFT-LCD panel have diverse ways [23][24][25][26]. The DC supply loop is one of the major radiation mechanisms because it may behave like an antenna, radiating the noises that were coupled from the T-CON.…”

Section: Common-mode Current On a DC Supply Loopmentioning

confidence: 99%

Estimating the Reduction of Radiated Emissions From TFT-LCD Panel Using Network Analyzer With a Bulk Current Injection Probe

Ho¹,

Chen²,

Horng³

et al. 2013

PIER

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Abstract-A network analyzer with a bulk current injection (BCI) probe is proposed to measure the common-mode conversion coefficient for DC supply loops on a driver PCB of thin film transistor-liquid crystal display (TFT-LCD) panel. The proposed technique is used to predict the common-mode radiated emission caused by the DC supply loops, which highly correlates with the radiated emission measurements obtained for the TFT-LCD panel in a fully anechoic chamber (FAC). The proposed technique is also successful to estimate the reduction of a specific peak in the radiated emission spectrum by shielding the DC supply loops on a driver PCB of TFT-LCD panel. Electromagnetic simulation and equivalent-circuit modeling approaches are developed to confirm the common-mode radiation mechanism in this study.

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“…The simultaneous switching noise (SSN) can propagate between the power planes and affect the whole system [1,2]. SSN is recognized as one of the most significant issues in modern high speed digital systems design.…”

Section: Introductionmentioning

confidence: 99%

A Hierarchical Tree Shaped Power Distribution Network Based on Constructal Theory for Ebg Structure Power Plane

Huang¹,

Liu²,

Guo³

2012

PIER B

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Abstract-In this paper, a tree-shaped power distribution network is designed based on constructal theory for planar EBG structure power plane on PCB, in order to optimize DC performance. Planar EBG structures suppress noise, and the network provides currents to them. This network is composed of hierarchical metal paths. The geometric parameters can be optimized based on the concept of constructal theory. The optimal performance consists of constructing the given area in a sequence of building blocks from the smallest size toward larger sizes hierarchically. In the meantime, a PCB power plane is developed with 2nd order tree-shaped constructal network. Analysis illustrates that EBG power plane with constructal tree shaped network has multifunctions of low voltage drop, current equidistribution and effective noise isolation.

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Transient Response Characterization of the High-Speed Interconnection RLCG-Model for the Signal Integrity Analysis

Cited by 47 publications

References 32 publications

Crosstalk and Discontinuities Reduction on Multi-Module Memory Bus by Particle Swarm Optimization

Crosstalk and Discontinuities Reduction on Multi-Module Memory Bus by Particle Swarm Optimization

Estimating the Reduction of Radiated Emissions From TFT-LCD Panel Using Network Analyzer With a Bulk Current Injection Probe

A Hierarchical Tree Shaped Power Distribution Network Based on Constructal Theory for Ebg Structure Power Plane

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