Top-Down Heterogeneous Synthesis of Analog and Mixed-Signal Systems

Abstract

A new approach for automated synthesis of analog and mixed-signal systems is presented. The heterogeneous genetic optimization strategy starts from a functional description and evolves a simple design solution in a strict topdown design process to a complex one that fulfills multiple objectives. Transformations of both architecture and parameters are applied. The expected improvement of the violated objectives is used as driver for the transformation selection. The topology is really created, giving the opportunity to explore new architectures.

Classification of analog synthesis tools based on their architecture selection mechanisms

“…In ANTIGONE [93] (depicted in Fig. 6), a straight mapping towards an initial seed is followed by an evolutionary optimization process that generates a complex, more realistic architecture to perform an analogto-digital conversion.…”

“…6. Example of a top-down creation process which starts from a textual description of the required functionality and generates a behavioral model of a specific architecture [93].…”

Automated synthesis of complex analog circuits

“…Hence the need arises for true architectural synthesis of analog systems. In [10] a framework is presented for the top-down hierarchical synthesis of analog and mixed-signal integrated systems. The approach goes from abstract specification down to detailed design, driven by the specifications in an optimization loop.…”

Automation in Mixed-Signal Design: Challenges and Solutions in the Wake of the Nano Era

“…This could be done manually where the designer goes from abstract specification down to detailed design, or could be driven by the specification in an optimization loop like in Darwin [13]. An example of recent results in ADC design [14] is in Figure 5 (left), which shows example operators that drill down towards implementation. By putting those sorts of operators into a multiobjective optimization framework, a whole set of trustworthy topologies can be generated, as Figure 5 (right) illustrates.…”