Toggle-masking scheme for x-filtering

Ramdas, Abishek; Sinanoglu, Ozgur

doi:10.1109/ets.2012.6233024

Cited by 4 publications

(2 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, depending on the circuit and test method, a very high fraction of signals may have X-values (see e. g., [8], [9]) that have to be taken into account during the test pattern generation process. Such X-sources include non-finalized parts in early design steps.…”

Section: Unknown Values In Circuit Testmentioning

confidence: 99%

Modeling Unknown Values in Test and Verification

Becker

Sauer

Scholl

et al. 2015

Formal Modeling and Verification of Cyber-Physical Systems

View full text Add to dashboard Cite

Abstract.With increasing complexities and a component-based design style the handling of unknown values (e. g., at the interface of components) becomes more and more important in electronic design automation (EDA) and production processes. Tools are required that allow an accurate modeling of unknowns in combination with algorithms balancing exactness of representation and efficiency of calculation. In the following, state-ofthe-art approaches are described that enable an efficient and successful handling of unknown values using formal techniques in the areas of Test and Verification.

show abstract

Section: Unknown Values In Circuit Testmentioning

confidence: 99%

Modeling Unknown Values in Test and Verification

Becker

Sauer

Scholl

et al. 2015

Formal Modeling and Verification of Cyber-Physical Systems

View full text Add to dashboard Cite

show abstract

“…Depending on the circuit and test method, a very high fraction of signals may have X-values. During test and in particular for special test modes such as faster than at-speed test, a high density of X-values has been reported [Wohl et al 2008], [Ramdas and Sinanoglu 2012]. For sequential logic simulation, the problem of simulation pessimism is more pronounced since the number of signals with X-value may even increase over time.…”

Section: Introductionmentioning

confidence: 99%

Exact Logic and Fault Simulation in Presence of Unknowns

Erb

Kochte

Sauer

et al. 2014

ACM Trans. Des. Autom. Electron. Syst.

View full text Add to dashboard Cite

Logic and fault simulation are essential techniques in electronic design automation. The accuracy of standard simulation algorithms is compromised by unknown or X-values. This results in a pessimistic overestimation of X-valued signals in the circuit and a pessimistic underestimation of fault coverage. This work proposes efficient algorithms for combinational and sequential logic as well as for stuck-at and transition-delay fault simulation that are free of any simulation pessimism in presence of unknowns. The SAT-based algorithms exactly classifiy all signal states. During fault simulation, each fault is accurately classified as either undetected, definitely detected, or possibly detected. The pessimism with respect to unknowns present in classic algorithms is thoroughly investigated in the experimental results on benchmark circuits. The applicability of the proposed algorithms is demonstrated on larger industrial circuits. The results show that, by accurate analysis, the number of detected faults can be significantly increased without increasing the test-set size. Preprint General Copyright NoticeThis article may be used for research, teaching and private study purposes. Any substantial or systematic reproduction, re-distribution, re-selling, loan or sub-licensing, systematic supply or distribution in any form to anyone is expressly forbidden. This is the author's "personal copy" of the final, accepted version of the paper published by ACM.c 2014 ACM. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Logic and fault simulation are essential techniques in electronic design automation. The accuracy of standard simulation algorithms is compromised by unknown or X-values. This results in a pessimistic overestimation of X-valued signals in the circuit, and a pessimistic underestimation of fault coverage. A Exact Logic and Fault Simulation in Presence of UnknownsThis work proposes efficient algorithms for combinational and sequential logic as well as for stuck-at and transition-delay fault simulation which are free of any simulation pessimism in presence of unknowns. The SAT-based algorithms exactly classifiy all signal states. During fault simulation, each fault is accurately classified as either undetected, definitely detected or possibly detected.The pessimism w. r. t. unknowns present in classic algorithms is thoroughly investigated in the experimental results on benchmark circuits. The applicability of the proposed algorithms is demonstrated on larger industrial circuits. The results show that by accurate analysis the number of de...

show abstract

Handling Unknown with Blend of Scan and Scan Compression

Shantagiri

Kapur

2018

J Electron Test

View full text Add to dashboard Cite

Toggle-masking scheme for x-filtering

Cited by 4 publications

References 23 publications

Modeling Unknown Values in Test and Verification

Modeling Unknown Values in Test and Verification

Exact Logic and Fault Simulation in Presence of Unknowns

Handling Unknown with Blend of Scan and Scan Compression

Contact Info

Product

Resources

About