Time dependence power laws of hot carrier degradation in SOI MOSFETS

Sinha, Soumendu; Duan, Franklin Li; Ioannou, D.E.; Jenkins, W.C.; Hughes, H.L.

doi:10.1109/soi.1996.552472

Cited by 15 publications

(5 citation statements)

References 2 publications

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“…4 shows that the drain current degradation of BC-SOI devices increases with a stress frequency at high gate bias pulse although the degradation is less significant than it at low gate bias pulse. It also shows that degradation rate decreases from 0.6 at 10 KHz to 0.3 at 5 MHz, which suggests a probable injection of both electrons and holes at low frequency and only electron injection at high frequency [11]. Some detailed study of the degradation rate dependence on stress frequency in BC-SOI devices is in progress.…”

Section: Resultsmentioning

confidence: 92%

“…1 shows that the drain current degradation of FB-SOI devices generally increases with stress frequency. From a power time dependence law ( ), the degradation rate with stress time is about 0.26, which indicates that the drain current degradation is due to only electron injection [11]. It is also observed that the degradation rate produced by the dc stress is nearly equal to the degradation rate produced by the ac stress and that the ac degradation rate is largely independent of the stress frequency.…”

Section: Methodsmentioning

confidence: 89%

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Hot carrier-induced SOI MOSFET degradation under AC stress conditions

Lee

Choi

Hyun

et al. 2002

IEEE Electron Device Lett.

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The hot-carrier-induced device degradation in partially depleted silicon-on-insulator (SOI) devices has been investigated under ac stress conditions. The device degradation of both floating-body SOI devices and body contacted SOI devices have been measured and analyzed for different ac stress frequencies and gate bias voltages. Possible degradation mechanisms are suggested.Index Terms-Hot carriers, insulated gate FETs, MOS devices, semiconductor device reliability, silicon-on-insulator (SOI) technology.

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Section: Resultsmentioning

confidence: 92%

Section: Methodsmentioning

confidence: 89%

Hot carrier-induced SOI MOSFET degradation under AC stress conditions

Lee

Choi

Hyun

et al. 2002

IEEE Electron Device Lett.

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“…In these equations, ∆X is the absolute value of the difference between X(t) and X(0). We can see that since the degradation of model parameters corresponds to interface state generation, which follows power-law time dependence, their degradation also has power-law time dependence, as shown in Table 1 [17]. All the slopes of the equations showing the time dependence of model parameter degradations lie in a small range of 0.2-0.51 (cf.…”

Section: Time-dependent Small-signal Model Considering Hot-carrier Effects Of Mosfetsmentioning

confidence: 86%

MOSFET Small-Signal Model Considering Hot-Carrier Effect for Millimeter-Wave Frequencies

Boon

Yang

et al. 2019

J Infrared Milli Terahz Waves

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The hot-carrier effect, which is caused by the generation of interface states, is the main degradation mechanism for MOSFETs. Predicting the degradation of circuit performance due to the hot-carrier effect is important for practical circuit design. In this paper, we propose a small-signal model considering the hot-carrier effect by establishing time-dependent model parameters, which is verified by small-signal simulation for 40-nm-process MOSFETs at millimeter-wave (mmW) frequencies. In the proposed small-signal model, the shift of relaxation time of the non-quasi-static (NQS) effect is investigated and verified for mmW frequencies for the first time. By comparing simulation and measurement results, it is shown that the shift of relaxation time of the NQS effect should be considered for the prediction of radio frequency (RF) performance degradation.. Keywords Hot-carrier degradation • millimeter wave • NMOSFETs • non-quasi-static (NQS) effect • power amplifier.

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“…The results shown in Fig. 16 are for nonsilicided 22-devices with a design channel length of 0.12 m. These results can be understood by considering that hot carrier degradation of device parameters often follow power time laws of the form parameter , where usually varies between 0.25 to 1, depending on the underlying degradation mechanism [20], [21]. When the degradation is caused by interface state generation, then when both electrons and holes are injected simultaneously, and if only holes or only electrons are injected.…”

Section: B Esd/hot Carrier Stress Interactionmentioning

confidence: 92%

NMOSFET ESD self-protection strategy and underlying failure mechanism in advanced 0.13-μm CMOS technology

Salman

Gauthier

Stadler

et al. 2002

IEEE Trans. Device Mater. Relib.

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In this paper, the high current characteristics encountered during electrostatic discharge (ESD) stress using nMOS/ npn protection devices in a 0.13-m CMOS technology are investigated for different device parameters: channel length, channel width, gate-oxide thickness, and drain/source contact to gate (DCG/SCG) spacing. From leakage current measurements following ESD stress, it is concluded that the shorter (0.13 m) devices fail because of source/drain filamentation, whereas longer (0.3 m) devices with thin (22 A) oxide gate fail because of oxide breakdown. This conclusion is consistent with and supported by numerical simulations of the electric field. It is also supported by the observed effect of hot carrier stress on 2 . Hot carrier stress experiments additionally revealed that ESD stress can and does affect subsequent hot carrier degradation of the device.

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Time dependence power laws of hot carrier degradation in SOI MOSFETS

Cited by 15 publications

References 2 publications

Hot carrier-induced SOI MOSFET degradation under AC stress conditions

Hot carrier-induced SOI MOSFET degradation under AC stress conditions

MOSFET Small-Signal Model Considering Hot-Carrier Effect for Millimeter-Wave Frequencies

NMOSFET ESD self-protection strategy and underlying failure mechanism in advanced 0.13-μm CMOS technology

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