MOSFET Small-Signal Model Considering Hot-Carrier Effect for Millimeter-Wave Frequencies

Abstract

The hot-carrier effect, which is caused by the generation of interface states, is the main degradation mechanism for MOSFETs. Predicting the degradation of circuit performance due to the hot-carrier effect is important for practical circuit design. In this paper, we propose a small-signal model considering the hot-carrier effect by establishing time-dependent model parameters, which is verified by small-signal simulation for 40-nm-process MOSFETs at millimeter-wave (mmW) frequencies. In the proposed small-signal model, the shift of relaxation time of the non-quasi-static (NQS) effect is investigated and verified for mmW frequencies for the first time. By comparing simulation and measurement results, it is shown that the shift of relaxation time of the NQS effect should be considered for the prediction of radio frequency (RF) performance degradation.. Keywords Hot-carrier degradation • millimeter wave • NMOSFETs • non-quasi-static (NQS) effect • power amplifier.

Linearity Distortion Assessment and Small-Signal Behavior of Nano-Scaled SOI MOSFET for Terahertz Applications

“…The recent advancement in complementary metal-oxidesemiconductor (CMOS) technology has revolutionized the field of wireless communication with the design of low-power, high-speed and linear ICs for THz frequency based communication systems. 1,8 This could become possible due to the recent development in MOS technology, as in CMOS design block, each IC is made up of millions of MOS transistors. 6 Also, the trend of hyperscaling in MOS technology has provided the flexibility to device designers for higher cut-off and maximum oscillation frequency with improved and speed-up transmission and reception in milimeter wave applications.…”

“…6 Also, the trend of hyperscaling in MOS technology has provided the flexibility to device designers for higher cut-off and maximum oscillation frequency with improved and speed-up transmission and reception in milimeter wave applications. 7,8 So, it is the primary concern among designers that the reported MOS technology should fulfill the necessary and sufficient performance for their implementation with such systems. However, in MOSFETs, the endless scaling beyond 100 nm nodes resulted in various small-dimension effects such as mobility degradation, drain-induced barrier lowering (DIBL), hot-carrier effect (HCE), parasitic capacitances etc.…”

“…However, in MOSFETs, the endless scaling beyond 100 nm nodes resulted in various small-dimension effects such as mobility degradation, drain-induced barrier lowering (DIBL), hot-carrier effect (HCE), parasitic capacitances etc. These short channel effects (SCEs) are the main cause of unwanted off-state leakages, 9 linearity distortion, 7 high frequency noise 3,8 and therefore deteriorates the overall system performance.There are various solutions available in recent literatures to overcome these short dimension effects and also various research groups are continuously working to improve the performance of nanoscaled MOS devices. [10][11][12][13][14][15][16] Recently, conventionally used Si substrates are found in-effective below 100 nm technology node and result in various off-state leakages and DIBL.…”