Threading dislocation removal from the near-surface region of epitaxial cadmium telluride on silicon by lithographic patterning of the substrate

Abstract

211) oriented silicon substrates were patterned and etched to give mesas of various sizes and shapes. Cadmium telluride epitaxial layers were deposited on the patterned substrates by molecular beam epitaxy (MBE). Dislocation termini in the epilayer were found to be concentrated in the trenches that formed the mesa boundaries. Mesa sizes up to 17 µm were found to be nearly free of threading dislocation termini. Threading dislocation termini are observed to congregate in lines parallel to the Ͻ321Ͼ crystallographic directions. Evidence of subsurface, horizontal dislocations running through the mesa is given.

Low-Temperature and Metamorphic Buffer Layers

“…Because the threading dislocations are steeply inclined to the growth interface, they grow out of the material and laterally grown regions are dislocation free. DSG/PHeP eliminates dislocations by image-force induced glide to sidewalls of mesa-patterned material either during growth or post-growth annealing, but the need for mesa patterning is quite restrictive except in applications where regular arrays of similar devices are to be defined, such as focal plane arrays of detectors [17]. Continuous films may be achieved by ELO/ pendeoepitaxy, but geometrically necessary defects are introduced along the intersections of the laterally grown semiconductor regions.…”