2003
DOI: 10.1109/jsen.2003.820318
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Thermomagnetic residual offset in integrated hall plates

Abstract: Integrated Hall plates show self-induced offset due to the current flow in their current leads. The magnetic field surrounding these current leads generates a magnetic offset signal, while their resistive heating causes thermoelectric offset voltages. This paper reports experimental results on these two effects. They are obtained using a novel test structure enabling to separate the two contributions. In addition, the experimental results concerning the thermal behavior of the test structure are compared with … Show more

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Cited by 22 publications
(4 citation statements)
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“…The offset voltage is defined as the Hall voltage measured in the absence of a magnetic field. Offset voltages are usually caused by mechanical stress, thermal gradients, geometrical errors, defects, and other irregularities within the device [24], [25]. Implementing current-spinning has been shown to reduce the offset voltage by a factor of over 1000 [26], [27].…”
Section: A Device Operation and Shape Optimizationmentioning
confidence: 99%
“…The offset voltage is defined as the Hall voltage measured in the absence of a magnetic field. Offset voltages are usually caused by mechanical stress, thermal gradients, geometrical errors, defects, and other irregularities within the device [24], [25]. Implementing current-spinning has been shown to reduce the offset voltage by a factor of over 1000 [26], [27].…”
Section: A Device Operation and Shape Optimizationmentioning
confidence: 99%
“…Besides capacitive effects [12,15,59], many siliconbased microdevices for the transduction of mechanical inputs exploit piezoresistive effects. Stimulated by studies of sensor effects in integrated Hall devices [60,61], the authors' group started developing novel piezoresistive silicon sensors around the year 2000 [62,63].…”
Section: Mechanical Silicon Microsensors and Systemsmentioning
confidence: 99%
“…The software performs the correction based on real-time readout of the chip temperature and interpolation. Residual offsets [17] are below 5 µV (standard deviation) at 160 • C after accelerated life testing. The Hall voltages are summed in the current domain after a transconductance amplification stage and appropriate sign inversion a k = ±1.…”
Section: B Electrical Signal Chainmentioning
confidence: 98%