Abstract:The thermal issues of Chip-On-Film (COF) packages are becoming increasingly important for high-pin count chips, whose performance is becoming increasingly limited by the maximum power that can be spread without exceeding the maximum junction temperature. This study conducts a numerical investigation to investigate the relationship between power dissipation and the surface temperature of the thermal chip in COF applications. This study develops an ANSYS finite element (FE) model to simulate the junction tempera… Show more
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