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Purpose -The reliability of chip-on-film (COF) packages is fundamentally dependent upon the quality of the eutectic Au-Sn joint formed between the Au bumps on the integrated circuit (IC) device and the Sn-plated Cu inner leads. Therefore, it is essential that an appropriate bonding temperature is achieved during the inner lead bonding (ILB) process. The purpose of this paper is to identify the optimal processing conditions which maximize the reliability of the Au-Sn joints. Design/methodology/approach -The paper commences by performing an experimental investigation to establish the temperature at three specific locations within the COF/ILB system in a typical gang-bonding process. The relationship between the setting temperature of the bonding tool and the temperature of the tool surface is then calibrated using an off-line experimental system. An ANSYS finite element (FE) model is then constructed to simulate the temperature distribution within the COF/ILB system under representative temperature conditions. The validity of the numerical model is confirmed by comparing the simulation results with the experimental temperature measurements. The FE model is then used in a 2 3 factorial design process to evaluate the effect of the principal COF/ILB processing parameters, namely the contact area, the tool temperature and the stage temperature, on the temperature induced at the interface between the Au bumps on the IC chip and the Sn-coated Cu leads on the polyimide film. Findings -The results reveal that the interfacial bonding temperature is determined primarily by the stage temperature. Originality/value -A regression analysis model is applied to the factorial design results to construct a COF/ILB design chart which enables the rapid identification of the stage and tool temperatures required to achieve the minimum feasible eutectic bonding temperature.

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