2004
DOI: 10.1143/jjap.43.1860
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Thermal Instability of Poly-Si Gate Al2O3 MOSFETs

Abstract: The thermal stability of a SiO2/Al2O3 dielectric stack under high-temperature annealing after poly-Si gate deposition was examined. An interface reaction occurs when the activation temperature is higher than the post deposition annealing temperature, which results in the reduction of the interfacial oxide layer and hence silicate formation. As a result, the characteristics of metal oxide semiconductor field effect transistors (MOSFETs), such as mobility, reliability, and the distribution of capacitance are sev… Show more

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Cited by 4 publications
(4 citation statements)
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“…The oxygen depth profiles of the annealed samples were wider than those before annealing, as shown in Fig. 4. In the SIMS analysis of the depth profile obtained by sputtering with primary ions, surface roughness should be considered when discussing the results.…”
Section: Annealing In Nitrogen Ambient Without Control Ofmentioning
confidence: 97%
See 1 more Smart Citation
“…The oxygen depth profiles of the annealed samples were wider than those before annealing, as shown in Fig. 4. In the SIMS analysis of the depth profile obtained by sputtering with primary ions, surface roughness should be considered when discussing the results.…”
Section: Annealing In Nitrogen Ambient Without Control Ofmentioning
confidence: 97%
“…To avoid the thermal exposure of the gate stack, post-source/drain gatestack-formation processes were proposed, called ''gate-last'' processes, in which the gate stack was formed after the source/drain activation step. 2,3) However, in the gate-last structures, it is difficult to balance the competing aims of high-temperature postdeposition annealing, which is to realize high-quality high-k film formation, such as HfA-lO(N) or HfSiO(N), 4,5) and of introducing mono-nickelsilicide (NiSi) into the source/drain region. 6,7) Therefore, the conventional gate stack with a the source/drain formation flow, which is called the ''gate-first'' process in contrast with the gate-last process, is still a strong candidate for the fabrication of the metal/high-k gate stack MOSFETs.…”
Section: Introductionmentioning
confidence: 99%
“…Many experimental studies of high-k materials such as aluminum oxide (Al 2 O 3 ), hafnium oxide (HfO 2 ), and zirconium oxide (ZrO 2 ) grown by atomic layer deposition (ALD) have been reported. [4][5][6][7][8][9][10][11][12][13][14] The ALD technique can control the uniformity and thickness of films on substrate surfaces at an atomic scale. 15,16 The important thing for the ALD process is the initial reaction between the molecule and surface, because it determines the high-k/surface interface structure.…”
Section: Introductionmentioning
confidence: 99%
“…3) Using Al-related high-k materials, such as alumina (Al 2 O 3 ) or hafnium aluminate (HfAlO x ), PDA is indispensable in suppressing mobility reduction. 4) However, interdiffusion between high-k and interfacial layers should be minimized. 5) In order to overcome this difficulty, an ultra-thin SiON interfacial layer with precise nitrogen profile control is required.…”
Section: Introductionmentioning
confidence: 99%