IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.
DOI: 10.1109/iccad.2004.1382543
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Theoretical framework for compositional sequential hardware equivalence verification in presence of design constraints

Abstract: We are interested in sequential hardware equivalence (or alignability equivalence) verification of synchronous sequential circuits [Pix92]

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Cited by 17 publications
(29 citation statements)
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“…The most related work to ours is Khasidashvili and coworker's framework at Intel for alignability-based compositional equivalence checking [4]. However, there are a number of differences between our approach and theirs.…”
Section: Related Workmentioning
confidence: 99%
See 4 more Smart Citations
“…The most related work to ours is Khasidashvili and coworker's framework at Intel for alignability-based compositional equivalence checking [4]. However, there are a number of differences between our approach and theirs.…”
Section: Related Workmentioning
confidence: 99%
“…However, there are a number of differences between our approach and theirs. First of all, the work in [4] is centered around the use of manually added verification properties, whereas we focus on a flow that is completely automatic. Second, the framework in [4] uses computationally expensive alignability computations to check all subparts, whereas we apply combinational techniques wherever possible.…”
Section: Related Workmentioning
confidence: 99%
See 3 more Smart Citations