The sensitivity of radiation-induced leakage to STI topology and sidewall doping

Rezzak, Nadia; Alles, Michael L.; Schrimpf, R.D.; Kalemeris, S.; Massengill, L.W.; Sochacki, John; Barnaby, Hugh

doi:10.1016/j.microrel.2010.12.013

Cited by 29 publications

(9 citation statements)

References 9 publications

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“…The channel length was 70 nm and the fin height was 30 nm. The leakage current depends on the doping along those parasitic paths [45]. The narrow bulk Fin-FETs correspond to the nominal FinFET design.…”

Section: A Fin-width Variationsmentioning

confidence: 99%

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

Chatterjee

Zhang

Bhuva

et al. 2014

IEEE Trans. Nucl. Sci.

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The total ionizing dose (TID) response of bulk Fin-FETs is investigated for various geometry variations, such as fin width, channel length, and fin pitch. The buildup of oxide-trapped charge in the shallow trench isolation turns on a parasitic transistor, leading to increased leakage current (higher .) The TID-induced degradation increases with decreasing fin width. Transistors with longer channels degrade less than those with shorter channels. Transistors with large fin pitch degrade more, compared to those with narrow fin pitch. TCAD simulations are used to analyze the buildup of trapped charge in the trench isolation oxide and its impact on the increase in leakage current. The strong influence of charge in the STI in narrow-fin transistors induces a parasitic leakage current path between the source and the drain, while in wide-fin devices, for the same amount of trapped charge in the isolation oxide, the subsurface leakage path is less effective.Index Terms-Buried oxide, charge trapping, FinFET, geometry dependence, hole traps, isolation oxide, subthreshold slope degradation, threshold voltage shift, total ionizing dose, worst-case bias.

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Section: A Fin-width Variationsmentioning

confidence: 99%

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

Chatterjee

Zhang

Bhuva

et al. 2014

IEEE Trans. Nucl. Sci.

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“…They concluded that several radiation-induced parasitic effects may appear, including parasitic sidewall leakage current due to charge trapping in field oxides [18], threshold voltage shift due to charge trapping in gate oxides, or degradation of subthreshold characteristics due to buildup of interface traps at Si-oxide interfaces [19]. However, only few of them were focused on MGy dose environments.…”

Section: A Bulk Technologymentioning

confidence: 99%

Investigations on the Vulnerability of Advanced CMOS Technologies to MGy Dose Environments

Gaillardin

Girard

Paillet

et al. 2013

IEEE Trans. Nucl. Sci.

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“…Thicker gate insulators of materials with a high dielectric constant (high-k) were introduced when SiO 2 had to be thinned down to dimensions that allowed electrons to tunnel through. But even in these cases, charge trapping in gate insulation was not a problem to their TID response [18]. Charges aggregated in the field oxides, namely, the intradevice isolation regions such as the BOX and the interdevice isolation such as the STI, induce drain-to-source I off .…”

Section: Silicon-on-insulator and Shallow Trench Isolationmentioning

confidence: 99%

Total Ionizing Dose Hardened and Mitigation Strategies in Deep Submicrometer CMOS and Beyond

Chatzikyriakou

Morgan

Groot

2018

IEEE Trans. Electron Devices

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-From man-made satellites and interplanetary missions to fusion power plants, electronic equipment that needs to withstand various forms of irradiation is an essential part of their operation. Examination of total ionizing dose (TID) effects in electronic equipment can provide a thorough means to predict their reliability in conditions where ionizing dose becomes a serious hazard. In this paper, we provide a historical overview of logic and memory technologies that made the biggest impact both in terms of their competitive characteristics and their intrinsically hardened nature against TID. Further to this, we also provide guidelines for hardened device designs and present the cases where hardened alternatives have been implemented and tested in the lab. The technologies that we examine range from silicon-on-insulator and FinFET to 2-D semiconductor transistors and resistive random access memory.Index Terms-2-D semiconductor, carbon, CMOS, deep submicrometer, FinFET, graphene, MoS2, resistive random access memory (RRAM), silicon-on-insulator (SOI), thin film, total ionizing dose (TID), ultrathin buried oxide (UTBOX).

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The sensitivity of radiation-induced leakage to STI topology and sidewall doping

Cited by 29 publications

References 9 publications

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

Investigations on the Vulnerability of Advanced CMOS Technologies to MGy Dose Environments

Total Ionizing Dose Hardened and Mitigation Strategies in Deep Submicrometer CMOS and Beyond

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