The monolithic HV BIPMOS

Zommer, N.

doi:10.1109/iedm.1981.190059

Cited by 18 publications

(2 citation statements)

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“…A lot of work for functional integration has been in vertical configuration whereas lateral configuration of BIMOS devices has not been much dealt. Monolithic integration of Bipolar and MOS device has been described from application point of view and terminal characteristics have been discussed in [6]. Lateral configuration offers distinct advantage of ease of integration.…”

Section: Introductionmentioning

confidence: 99%

“…Resulting vertical difference between source and p-well junctions are shown in the Table. Change in implantation dose of phosphorus for n drift-region from 6.5 x 10" to 6 fixed oxide charge is = To analyse interdependence of g, and /3 analytical calculations of transconductance per unit channel width have been done for various channel lengths, 1 to 4 pm for LDMOST and treating channel length as base width of bipolar transistor. The current gain of bipolar transistor is defined as ratio of injected electrons into base to the holes into emitter.…”

Section: Introductionmentioning

confidence: 99%

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A new generation of intelligent power devices for motor drive applications

Motto¹,

Donion²,

Majumdar

et al.

Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting

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Photo 1 shows the developed high-frequency SIT chip ( an example from the THF-50 Series).This chip has a large area (10m X 1Om) in order to achieve high-power operation.To meet the requirement to improve the high-frequency characteristics of the SIT while maintaining a large channel area, the gate length was reduced to a a large reduction from that in conventional chips.The TtlF Series has a number of these chips encased in a large metal housing.Photo 2 shows the appearance of these high-frequen-CY high-power SIT's housed in metal casing, as well as two circuits incorporated into molded modules via A1N insulated substrates.The TtM Series consists of SITS with further reduced input capacitance.As the chip area is increased to obtain higher power. capacitances distributed between gate to source and between gate t o drain also increase.AS a result, more time is needed to charge and discharge these capacitances, thus restricting the devices operation to lower frequencies.In addittion, operation at high frequencies necessitates a lowering of the driving impedance, thus making the gate driver circuitry more complex. length of 1 mm ; u m 6 8 8 8 um 6 6 8 8In order to commercialize SIT's with even higher breakdown voltage and power, it is necessary to retain the advantages of the THF Series and reduce the capacitances of the device. This has been accomplished by developing the following technologies: 1) Iligh-puri ty epitaxial growth technology that results on a lower concentrations of impurities with fewer crystal defects and thus a thicker drain layer has been obtained Technology for stable diffusion with high doping concentration and good doping distribution, giving d is tort ion 1 ess gates 3) Epitaxial growth technology for low doping concentration of the source layers 4) High doping concentration buried gate forming technology with high accuracy 5) Fine structure processing and surface protection t ec hno 1 ogy Cross-sectional structures of the SIT chips interious are shown in Fig. 2 and. structural details in Table 1. Structural characteristics for the 2SK180 SIT 300 W type and the 2SK182 SIT 1 KW type are also shown for comparison. c532)

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%