The Effect of Copper on Gate Oxide Integrity

Abstract

We have studied the effect of copper contamination after the front-end metal-oxide-semiconductor capacitor fabrication on gate oxide integrity. The significant effect of Cu contamination on the pretunneling current, in combination with insensitive dependence of the Fowler-Nordheim tunneling current, oxide charge density, and breakdown field on the Cu concentration, suggests that the current leakage mechanism may be due to neutral traps generated by Cu inside oxide. In addition to pretunneling oxide leakage, a small amount of Cu contamination increases the interface trap density that may degrade the device performance.

The Copper Contamination Effect of Al[sub 2]O[sub 3] Gate Dielectric on Si

“…In sharp contrast, only slightly increasing leakage current at lowest 0.5 V bias can be observed in the 4.2 nm Al 2 O 3 ͑1.9 nm EOT͒. This increasing leakage current in the pretunneling region at low voltage is also previously observed in thick 5.0 nm SiO 2 and oxynitride with 16% N content, [10][11][12] which is attributed to the trapassisted tunneling originated by neutral traps formed by Cu inside the oxide matrix. It is noticed that although the degradation of pretunneling leakage current is negligible for the 3.6 nm oxynitride with 23% N, the Al 2 O 3 still has strong advantage of much smaller EOT of only 1.9 nm than the 3.0 nm EOT oxynitride ͑23% N͒.…”

“…This suggests that the Cu may behave as a neutral trap in the gate dielectric, consistent with our previous report. 12 For comparison, the J-(V G -V FB ) characteristics of a 3.0 nm thick SiO 2 MOS device were also plotted. For samples without Cu contamination, the 1.9 nm EOT Al 2 O 3 gate capacitor has ca.…”

“…A more detailed Cu contamination process and discussion of degradation on gate dielectric integrity of SiO 2 and SiON can be found in our previous publications. [10][11][12] The Cu contamination effect was studied by current-density and voltage ͑J-V͒ measurements in high-Al 2 O 3 gate dielectric MOS capacitors. Figure 1 shows the J-(V G -V FB ) characteristics of Al 2 O 3 gate capacitors with ϳ4.2 nm physical thickness ͑1.9 nm EOT͒, where the V FB is the flatband voltage obtained from the C-V measurement and quantum mechanical calculation.…”

Cu Contamination Effect in Oxynitride Gate Dielectrics

“…2a, b, and c. For the thickest 4.7 nm oxynitride with the lowest nitrogen content, the Cu contamination increases the leakage current and the contamination effect saturates for a Cu concentration above 10 ppb. This saturation effect is believed to be due to the limited Cu solubility in the dielectric during the annealing at 400°C for 1 h. 6 Although a similar Cu saturation contamination effect is also observed in the thinner 4.4 nm oxynitride, the leakage current increase is reduced. However, the current increase is negligible for the thinnest 3.6 nm oxynitride with the highest nitrogen content of 23%, which is in sharp contrast to the much larger leakage current for the 3.0 nm thermal SiO 2 shown in Fig.…”

Poly-Si Thin-Film Transistors Crystallized by Electron-Beam Annealing

“…2 The MILC process can have a lower thermal budget than furnace crystallization, but it still requires long annealing time ͑several hours͒ 3 and is suspected to have metal contamination issues. 7,8 Although excimer laser crystallization has the advantage of low thermal budget, it suffers from surface roughness 6 and related uniformity difficulties that may prohibit further scaling down the gate oxide [9][10][11] and device performance improvement. In this work, we have studied the device performance of TFTs crystallized by electron-beam annealing 12 without the capping layer.…”