The Effect of a Nucleation Layer on Morphology and Grain Size in MOCVD-Grown β-Ga2O3 Thin Films on C-Plane Sapphire

Dimitrocenko, Lauris; Strīķis, Gundars; Polyakov, Boris; Bikse, Liga; Oras, Sven; Butanovs, Edgars

doi:10.3390/ma15238362

Cited by 6 publications

(1 citation statement)

References 35 publications

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“…The effective mobilities of the S F and M F devices were calculated to be 1.02 × 10 −3 and 7.35 × 10 −3 cm 2 /Vs, respectively, which are considerably lower than the values reported in [5] and [24]. The low mobility is mainly caused by the relatively poor film quality of heteroepitaxially grown β-Ga 2 O 3 on the sapphire substrate because of the lattice mismatch between the sapphire substrate and the β-Ga 2 O 3 thin film [25].…”

Section: A Transistor Characteristicsmentioning

confidence: 65%

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

Chettri,

Mainali,

Amruth

et al. 2023

IEEE Trans. Electron Devices

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In this article, we report on the fabrication of β-Ga 2 O 3 pseudo-CMOS inverters using enhancementmode (E-mode) β-Ga 2 O 3 single-finger (S F ) and multifinger (M F ) thin-film transistors (TFTs). Initially, single-stage monolithic inverter ICs were fabricated using TFTs having threshold voltages V SF th = 0.6 V and V MF th = 0.1 V. However, the single-stage inverter yielded poorer gain (4.50 at V DD , supply voltage = 3 V). Alternatively, a pseudo-CMOS (double-stage) inverter was designed and fabricated, yielding a maximum gain of 6.45 but with a poor noise margin (NM). To improve the NM, the pseudo-CMOS circuit was tested using TFTs having higher threshold voltages (V SF th = 1.85 V and V MF th = 1.75 V). Notably, the optimized pseudo-CMOS circuit exhibited the least peak power consumption (0.2 nW) and the maximum gain of 8 at V DD = 3 V. The monolithically integrated devices' performance and IC highlight this technology's remarkable potential for application in the emerging sector of power electronics and extreme-environment electronics.Index Terms-β-Ga 2 O 3 heteroepitaxy, β-Ga 2 O 3 thin-film transistors (TFTs), inverter logic circuits, pseudo-CMOS. I. INTRODUCTIONβ -Ga 2 O 3 , an emerging ultrawide-bandgap (UWBG) material with a bandgap of 4.8 eV and a large breakdown field of 8 MV/cm, is a promising candidate for high-power electronics [1]. Furthermore, the availability of high-quality β-Ga 2 O 3 substrates promoted the entry of β-Ga 2 O 3 electronics into the market [2]. In addition to power electronics, UWBG CMOS circuits are highly desirable for extreme-environment

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Section: A Transistor Characteristicsmentioning

confidence: 65%

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

Chettri,

Mainali,

Amruth

et al. 2023

IEEE Trans. Electron Devices

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Material Properties of n‐Type β‐Ga₂O₃ Epilayers with In Situ Doping Grown on Sapphire by Metalorganic Chemical Vapor Deposition

Tarntair,

Huang,

Rana

et al. 2024

Adv Elect Materials

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In this study, in situ, Si‐doped heteroepitaxial Ga2O3 layers are grown on c‐plane sapphire by metalorganic chemical vapor deposition. The X‐ray diffraction peaks of the doped Ga2O3 epilayers shows ß‐phase of Ga2O3 ,and full width at half maximum of Ga2O3 crystallinity is decreased at a Tetraethoxysilane (TEOS) molar flow rate of 2.23 × 10−7 mol min−1 but increased with higher flow rates. The dopant concentrations of Ga2O3 grown at 825 °C with TEOS molar flows of 2.23 × 10−7, 4.47 × 10−7, and 6.69 × 10−7 mol min−1 are measured to be 5.5 × 1019, 1.1 × 1020, and 1.4 × 1020 atom cm−3, respectively, using secondary ion mass spectra and Hall measurements reveal n‐type nature with carrier concentrations of 6.5 × 1017, 3.2 × 1018, and 3.9 × 1018 atom/cm3 , respectively. To increase Si dopant activation, Ga2O3 growth temperature is raised to 875 °C. The result suggests a higher growth temperature can contribute to a greater probability of Si substitution on Ga lattice sites, which further reduces the resistivity of Ga2O3 epilayer. Moreover, results are compared with theoretical Density Functional Theory studies.

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无真空、低成本Mist-CVD外延制备高质量单晶NiO/Ga2O3 p-n异质结与器件

Zhang,

Song,

Liu

et al. 2024

Sci. China Mater.

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The Effect of a Nucleation Layer on Morphology and Grain Size in MOCVD-Grown β-Ga2O3 Thin Films on C-Plane Sapphire

Cited by 6 publications

References 35 publications

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

Material Properties of n‐Type β‐Ga₂O₃ Epilayers with In Situ Doping Grown on Sapphire by Metalorganic Chemical Vapor Deposition

无真空、低成本Mist-CVD外延制备高质量单晶NiO/Ga2O3 p-n异质结与器件

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The Effect of a Nucleation Layer on Morphology and Grain Size in MOCVD-Grown β-Ga2O3 Thin Films on C-Plane Sapphire

Cited by 6 publications

References 35 publications

β-Ga2O3 Pseudo-CMOS Monolithic Inverters

β-Ga2O3 Pseudo-CMOS Monolithic Inverters

Material Properties of n‐Type β‐Ga2O3 Epilayers with In Situ Doping Grown on Sapphire by Metalorganic Chemical Vapor Deposition

无真空、低成本Mist-CVD外延制备高质量单晶NiO/Ga2O3 p-n异质结与器件

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Product

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About

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

β-Ga₂O₃ Pseudo-CMOS Monolithic Inverters

Material Properties of n‐Type β‐Ga₂O₃ Epilayers with In Situ Doping Grown on Sapphire by Metalorganic Chemical Vapor Deposition